ISL6141IB Intersil, ISL6141IB Datasheet
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ISL6141IB
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ISL6141IB Summary of contents
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... ISL6141, ISL6151 July 2004 FN9079.1 electronic circuit breaker distinguishes ISL6141 OR ISL6151 (8 LEAD SOIC TOP VIEW DRAIN GATE SENSE EE Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002, 2004. All Rights Reserved Intellitrip™ trademark of Intersil Americas Inc. ...
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... PART NO. TEMP. RANGE ( C) PACKAGE ISL6141CB Lead SOIC M8.15 ISL6141CBZA Lead SOIC (See Note) (Pb-free) ISL6151CB Lead SOIC M8.15 ISL6151CBZA Lead SOIC (See Note) (Pb-free) ISL6141IB - Lead SOIC M8.15 ISL6141IBZA - Lead SOIC (See Note) (Pb-free) ISL6151IB - Lead SOIC M8.15 GND 1.265V 1.255V ...
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Pin Descriptions PWRGD (ISL6141; L Version) Pin 1 This digital output is an open-drain pull-down device. During start-up the DRAIN and GATE voltages are monitored with two separate comparators. The first comparator looks at the DRAIN pin voltage compared to ...
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GATE Pin 6 - This analog output drives the gate of the external FET used as a pass transistor. The GATE pin is high (FET is on) when the following conditions are met: • UVLO is above its trip point ...
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Absolute Maximum Ratings Supply Voltage ( -0.3V to 100V DD EE DRAIN, PWRGD, PWRGD Voltage . . ...
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Electrical Specifications V = +48V Commercial (0 PARAMETER UV Pin Input Current OV pin OV Pin High Threshold Voltage OV Pin Low Threshold Voltage OV Pin Hysteresis OV Pin Input Current DRAIN Pin Power Good Threshold (PWRGD/PWRGD active) ...
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Test Circuit and Timing Diagrams PWRGD ISL6141 ISL6151 FIGURE 2A. TYPICAL TEST CIRCUIT OV Pin 2V 1.255V 0V t PHLOV 13.6V 1V GATE ...
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Test Circuit and Timing Diagrams 50mV SENSE t PHLSENSE GATE ~4V (depends on FET threshold) FIGURE 6. SENSE TO GATE TIMING Typical Performance Curves 4.5 4 3.5 3 2.5 2 1 ...
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Typical Performance Curves 2.45 2.4 2.35 2.3 2.25 2.2 2.15 2.1 -40 - Temperature (C) FIGURE 11. SUPPLY CURRENT VS TEMPERATURE 13.9 13.8 13.7 13.6 13.5 13.4 13.3 -40 - Temperature (C) ...
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Typical Performance Curves -40 - Temperature (C) FIGURE 17. GATE PULL-DOWN CURRENT (UV/OV/TIME-OUT) VS TEMPERATURE -40 - ...
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Applications Information GND -48V IN FIGURE 23. TYPICAL APPLICATION WITH MINIMUM COMPONENTS Typical Values for a representative system; which assumes: • 43V to 71V supply range; 48 nominal 43V 71V • 1Amp of typical current draw; ...
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the Over-Current sense resistor. If the input current is high enough, such that the voltage drop across R1 exceeds the SENSE comparator trip point (50mV nominal), the GATE pin will be pulled lower (to ~4V) and current ...
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Inrush Current Control The primary function of the ISL6141 hot plug controller is to control the inrush current. When a board is plugged into a live backplane, the input capacitors of the board’s power supply circuit can produce large current ...
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In addition to the above current limit and 600µs time-out, there is a Hard Fault comparator to respond to short circuits with an immediate GATE shutdown (typically 10µs) and a single retry. The trip point of this comparator is set ...
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The three resistor divider (R4, R5, R6) is the recommended approach for most cases. But if acceptable values can’t be found, then consider 2 separate resistor dividers (one for each ...
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When any of the 4 conditions occur that turn off the GATE (OV, UV, UVLO, Over-Current Time-Out) the PWRGD latch is reset and the Q2 DMOS device will shut off (high impedance). The pin will quickly be pulled high by ...
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The brick’s output capacitance is also determined by the system, including load regulation considerations. However, it can affect the ISL6141/51, depending upon how it is enabled. For example, if the PWRGD signal is not used to enable the brick, the ...
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Applications: Layout Considerations For the minimum application, there are only 6 resistors, 2 capacitors, one IC and one FET. A sample layout is shown in Figure 35. It assumes the IC is 8-SOIC; the FET D2PAK (or ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...