ISL97671IRZ-T Intersil, ISL97671IRZ-T Datasheet
ISL97671IRZ-T
Specifications of ISL97671IRZ-T
Related parts for ISL97671IRZ-T
ISL97671IRZ-T Summary of contents
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... AGND CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners 8-bit with equal phase Short Circuit, OUT (see page 27) *V > ...
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V = 4.5~26.5V IN FIGURE 2. ISL97671 TYPICAL APPLICATION DIAGRAM WITH EXTERNAL PWM SIGNAL CONTROL Block Diagram V = 4.5V TO 26.5V IN VIN VIN EN VDC REG OSC AND RAMP COMP f PWM LED PWM CONTROL COMP RSET AGND ...
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... PART (Notes 1, 2) MARKING ISL97671IRZ 7671 20 Ld 4x3 QFN ISL97671IRZ-EVAL Evaluation Board NOTES: 1. Add “-T” or “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die ...
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Table of Contents Typical Application Circuit ................................. 1 Block Diagram ................................................... 2 Pin Descriptions (I = Input Output Supply)..................................................... 3 Absolute Maximum Ratings . . . . . . . . . . . . . ...
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... Thermal Resistance (Typical QFN Package (Notes 4, 5, 7). Thermal Characterization (Typical QFN Package (Note Maximum Continuous Junction Temperature . . . . . . +125°C Storage Temperature . . . . . . . . . . . . . . . -65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 25° CONDITION ≤13 LEDs per channel (3.2V/20mA type) 4.5V < V ≤ ...
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Electrical Specifications All specifications below are tested at T otherwise noted. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER DESCRIPTION t EN Low Time Before Shut-down ENLow BOOST SWILimit Boost FET Current Limit r Internal ...
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Electrical Specifications All specifications below are tested at T otherwise noted. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER DESCRIPTION FPWM PWM Input Frequency Range PWMACC PWM Input Accuracy tDIRECTPWM Direct PWM Minimum On Time ...
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Typical Performance Curves 100 24V 12V LED(mA) FIGURE 4. EFFICIENCY 20mA LED CURRENT (100% LED DUTY CYCLE 100 90 ...
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Typical Performance Curves 1.2 1.0 0.8 0 0.4 0 FIGURE 10. CURRENT LINEARITY vs LOW LEVEL PWM DIMMING DUTY CYCLE vs V FIGURE 12. V RIPPLE VOLTAGE, V OUT AT 20mA/CHANNEL FIGURE ...
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Typical Performance Curves FIGURE 16. LINE REGULATION WITH V FROM 26V TO 6V FOR 6P12S AT 20mA/CHANNEL FIGURE 18. LOAD REGULATION WITH I FROM 100 PWM DIMMING 12V, 6P12S AT 20mA/CHANNEL IN Theory of Operation PWM ...
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For example LEDs are used with the worst case V of 35V and R are chosen such that the OVP OUT 1 2 level is set at 40V, then the V is allowed to operate OUT ...
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Equations 2 and 3. The source of the PWM signal can be described as follows: 1. Internally generated 256 step duty cycle programmed through the SMBus/I 2. External signal from PWM. 3. DPST mode. Internally generated signal with a duty ...
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FPWM t t ILED0 ON OFF ILED1 ILED2 ILED3 ILED4 ILED5 FIGURE 21. NO DELAY (DEFAULT PHASE SHIFT DISABLED) When EqualPhase = 1, the phase shift evenly spreads the channels switching across the PWM cycle, depending on how many ...
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In-rush Control and Soft-start The ISL97671 has separately built in independent in-rush control and soft-start functions. The in-rush control function is built around the short circuit protection FET, and is only available in applications, which include this device. At start-up, ...
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LED shorts. See Table 1 for details for responses to fault conditions. Overvoltage Protection (OVP) The integrated OVP circuit monitors the output voltage and keeps the voltage at a safe ...
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V IN FAULT DRIVER IMAX ILIMIT VSET/2 REG FAULT/ STATUS REGISTER CASE FAILURE MODE DETECTION MODE 1 CH0 Short Circuit Upper Over-Temperature Protection limit (OTP) not triggered and CH0 < CH0 Short Circuit Upper OTP triggered but VCH0 ...
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CASE FAILURE MODE DETECTION MODE 7 CH0 LED Open Upper OTP not Circuit but has triggered but CHx > paralleled Zener 4V 8 Channel-to- Lower OTP triggered Channel but CHx < 4V ΔVF too high 9 Channel-to- Upper OTP triggered ...
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S Slave Address Master to Slave Slave to Master Slave Address W A Master to Slave Slave to Master 2 SMBus/I C Communications The ISL97671 can be controlled by SMBus dimming. ...
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... OV_CURR = Input overcurrent (1 = Overcurrent condition Current OK) THRM_SHDN = Thermal Shutdown (1 = Thermal fault Thermal OK) FAULT = Fault occurred (Logic “OR” of all of the fault conditions) MFG[3..0] = Manufacturer ID (16 vendors available. Intersil is vendor ID 9) REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for silicon spins) DEFAULT ...
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TABLE 2B. DATA BIT DESCRIPTIONS (Continued) ADDRESS REGISTER 0x07 DC Brightness Control Register 0x08 Configuration Register 0x09 Output Channel Mask/Fault Readout Register 0x0A Phase Shift Degree PWM Brightness Control Register (0x00) The Brightness control resolution has 256 steps of PWM ...
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REGISTER 0x01 DEVICE CONTROL REGISTER RESERVE RESERVE RESERVE Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) Bit 4 (R/W) Bit 3 (R/W) Bit 2 (R/W) Bit 1 (R/W) Bit 0 (R/W) PWM_MD PWM_SEL BL_CTL X X ...
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... ID made it to the factory. Except Bit 7, which has all of the bits in this register are read- only. • Vendor ID 9 represents Intersil Corporation. • The default value for Register 0x03 is 0xC8. The initial value of REV shall be 0. Subsequent values of REV will increment by 1 ...
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... BIT ASSIGNMENT = Manufacturer ID. See “Identification MFG[3..0] Register (0x03)” on page 22. data decimal correspond to other vendors data 9 in decimal represents Intersil ID data decimal are reserved data 15 in decimal Manufacturer ID is not implemented REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for silicon spins) ...
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Output Channel Mask/Fault Readout Register (0x09) This register can be read or write; the bit position corresponds to the channel. For example, Bit 0 corresponds to Ch0 and bit 5corresponds to Ch5 and so on. Writing data to this register, ...
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REGISTER 0x0A PHASE SHIFT CONTROL REGISTER EQUALPHASE PHASESHIFT6 PHASESHIFT5 PHASESHIFT4 PHASESHIFT3 PHASESHIFT2 PHASESHIFT1 PHASESHIFT0 Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) BIT ASSIGNMENT EqualPhase Controls phase shift mode - When 0, phase shift is defined by PhaseShift<6:0>. When ...
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The series resistance, DCR, within the inductor causes conduction loss and heat dissipation. A shielded inductor is usually more suitable for EMI susceptible applications, such as LED backlighting. The peak current can be derived from the ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...
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Package Outline Drawing L20.3x4 20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 3/10 3. PIN 1 INDEX AREA A TOP VIEW (2.65) (3.80) (1.65) (2.80) TYPICAL RECOMMENDED LAND PATTERN 28 ISL97671 A B 20X 4 4.00 0.15 ...