ISL97671IRZ-TK Intersil, ISL97671IRZ-TK Datasheet - Page 7

• Manufacturer Part Number: ISL97671IRZ-TK
• Description: IC LED DVR PWM CTRL 6CH 20QFN
• Manufacturer: Intersil

Specifications of ISL97671IRZ-TK

• Topology: PWM, Step-Up (Boost)
• Number Of Outputs: 6
• Internal Driver: Yes
• Type - Primary: Automotive, Backlight
• Type - Secondary: RGB, White LED
• Frequency: 600kHz ~ 1.2MHz
• Voltage - Supply: 4.5 V ~ 26.5 V
• Mounting Type: Surface Mount
• Package / Case: 20-VFQFN Exposed Pad
• Operating Temperature: -40°C ~ 85°C
• Current - Output / Channel: 40mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

Electrical Specifications
NOTES:
10. Limits established by characterization and are not production tested.
PARAMETER
FAULT PIN
LXstart_thres LX Start-up Threshold
SMBus/I
SMBus/I
tDIRECTPWM Direct PWM Minimum On Time
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
9. Independent from the numbers of LEDs, at minimum V
t
ILXStart-up
EN
PWMACC
by characterization and are not production tested.
26.5V, minimum V
t
t
t
t
t
-SMB/I
FPWM
V
FPWM
I
SU:STO
HD:DAT
HD:STA
SU:STA
SU:DAT
I
t
PWS
t
VOL
f
FAULT
VIH
t
FAULT
HIGH
VIL
LEAK
LOW
SMB
BUF
t
t
R
F
2
2
2
C INTERFACE
C TIMING SPECIFICATIONS (Note 10)
C
PWM Input Frequency Range
PWM Input Accuracy
PWM Dimming Frequency Range
Fault Pull-down Current
Fault Clamp Voltage with Respect to V
LX Start-up Current
Guaranteed Range for Data, Clock Input Low
Voltage
Guaranteed Range for Data, Clock Input High
Voltage
SMBus/I
Input Leakage On SMBData/SMBClk
Minimum Time Between EN high and
SMBus/I
Pulse Width Suppression on
SMBCLK/SMBDAT
SMBus/I
Bus Free Time Between Stop and Start
Condition
Hold Time After (Repeated) START
Condition. After this Period, the First Clock is
Generated
Repeated Start Condition Setup Time
Stop Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Period
Clock High Period
Clock/data Fall Time
Clock/data Rise Time
OUT
2
2
2
C Enabled
C Clock Frequency
C Data line Logic Low Voltage
is limited 28V.
7
DESCRIPTION
All specifications below are tested at T
otherwise noted. Boldface limits apply over the operating temperature range, -40°C
to +85°C. (Continued)
IN
ISL97671
IN
of 4.5V, maximum V
Direct PWM Mode
RFPWM = 660kΩ
V
V
I
Measured at 4.8V
1µF capacitor on VDC
PULLUP
IN
IN
= 12V
= 12, V
= 4mA
CONDITION
IN
A
= 25°C; V
- V
FAULT
OUT
is limited to 35V. And at maximum V
IN
= 12V, EN = 5V, R
(Note 8) TYP
MIN
200
250
0.15
-10
300
100
1.3
1.5
1.3
0.6
0.6
0.6
1.3
0.6
12
90
6
1
2
100
1.4
3.5
21
8
7
SET
(Note 8) UNIT
= 20.1kΩ, unless
30,000
MAX
VDD
0.17
0.45
350
400
300
300
8.3
1.5
0.8
110
30
10
5
June 24, 2010
FN7631.0
IN
bits
kHz
mA
ms
µA
µA
Hz
ns
Hz
µs
µs
µs
µs
µs
ns
ns
µs
µs
ns
ns
V
V
V
V
V
of