ISL97635IRZ-T Intersil, ISL97635IRZ-T Datasheet
ISL97635IRZ-T
Specifications of ISL97635IRZ-T
Related parts for ISL97635IRZ-T
ISL97635IRZ-T Summary of contents
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... Ordering Information PART NUMBER PART (Note) MARKING ISL97635IRZ* 976 35IRZ *Add “-T” or “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach ...
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Typical Application Circuit VBL 24V 2 ISL97635 V = 34.5V, 30mA PER STRING OUT ISL97635 FAULT OVP 16 VIN 24 PGND VDC 17 PGND 18 22 IIN0 15 COMP SMBCLK 1 ...
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Block Diagram VBL 24V VIN VIN VDC REG OSC AND RAMP COMP f PWM LED PWM CONTROL COMP GM AMP + + - - RSET GND SMBUS SMBCLK INTERFACE SMBDAT PWMI PWMO 3 ISL97635 FAULT ISL97635 FAULT/STATUS ...
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... DS(ON) 4 ISL97635 Thermal Information Thermal Resistance (Typical, Notes 1, 2) θ QFN . . . . . . . . . . . . . . . . . . . . . . Thermal Characterization (Typical, Note QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Maximum Continuous Junction Temperature . . . . . . . . . . . . +125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = and θ -40°C to +85° DESCRIPTION ≤ ...
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Electrical Specifications All specifications below are tested at T unless otherwise noted. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER Eff_peak Peak ...
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Electrical Specifications All specifications below are tested at T unless otherwise noted. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER t Data ...
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Electrical Specifications All specifications below are tested at T unless otherwise noted. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER FAULT PIN ...
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Typical Performance Curves 2.0 1.5 12V/1mA 1.0 12V/20mA 0.5 0.0 -0.5 6V/20mA -1.0 6V/1mA -1.5 -2 CHANNELS FIGURE 6. CHANNEL-TO-CHANNEL CURRENT MATCHING 180 8 ...
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Typical Performance Curves FIGURE 12 50% PWM DIMMING FIGURE 14. RIPPLE VOLTAGE 9 ISL97635 (Continued) FIGURE 16. RIPPLE VOLTAGE ZOOM IN FIGURE 13. LX ZOOM IN AT 50% DIMMING FIGURE 15 50% PWM DIMMING LED December ...
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Pinout Pin Descriptions (I = Input Output Supply) PIN NAME TYPE 1 SMBCLK I 2 SMBDAT I/O 3 FPWM I 4 PWMO I/O 5 GND S 6 PWMI/ IIN7 I 8 IIN6 I 9 ...
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Pin Descriptions (I = Input Output Supply) (Continued) PIN NAME TYPE 22 COMP O 23 VIN S 24 VDC S Theory of Operation PWM Boost Converter The current mode PWM boost converter produces the minimal voltage ...
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MAXIMUM DC CURRENT SETTING The initial brightness should be set by choosing an appropriate value for R . This should be chosen to fix the SET maximum possible LED current, as shown in Equation 1: 733 -------------- - I = ...
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PWMO pin for DPST mode operation which will be described in “PWM Dimming Frequency Adjustment” on page 13. For example, if the SMBus controlled PWM duty is 80% dimming at 200Hz (see C Equation 12) and the FPWM external PWMI ...
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For systems with no master fault protection FET, the inrush current will flow ...
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This monitoring happens on a cycle by cycle basis in a self protecting way. Additionally, the ISL97635 monitors the voltage at the LX and OVP pins. At start-up, a fixed current is injected out of the LX pins and ...
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CASE FAILURE MODE DETECTION MODE 1 CH0 Short Circuit Upper Over-Temperature Protection limit (OTP) not triggered and VIIN0 < VSC 2 CH0 Short Circuit Upper OTP triggered but VIN0 < VSC 3 CH0 Short Circuit Upper OTP not triggered but ...
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SMBCLK t LOW HD:STA SMBDAT BUF P S NOTES: SMBus Description S = Start condition P = Stop condition A = Acknowledge A = Not acknowledge R/W = Read enable ...
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Write Byte The Write Byte protocol is only three bytes long. The first byte starts with the slave address followed by the “command code,” which translates to the “register index” being written. The third byte contains the data byte that ...
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... OV_CURR = Input overcurrent (1 = Overcurrent condition Current OK) THRM_SHDN = Thermal Shutdown (1 = Thermal fault Thermal OK) FAULT = Fault occurred (Logic “OR” of all of the fault conditions) MFG[3..0] = Manufacturer ID (16 vendors available. Intersil is vendor ID 9) REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for silicon spins) BRTDC[7..0] = 256 steps of DC brightness control VSC[1 ...
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TABLE 3. OPERATING MODES SELECTED BY DEVICE CONTROL REGISTER BITS 1 AND 2 PWM_MD PWM_SEL X 1 PWMI Mode 1 0 SMBus Mode 0 0 SMBus and PWMI Mode with DPST The PWM_SEL bit determines whether the SMBus or PWMI ...
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... ID made it to the factory. Except Bit 7, which has all of the bits in this register are read-only. • Vendor ID 9 represents Intersil Corporation. • The default value for Register 0x03 is 0xC8. The initial value of REV shall be 0. Subsequent values of REV will increment by 1 ...
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... Bit 5 (R) BIT ASSIGNMENT = Manufacturer ID. See “Identification Register MFG[3..0] (0x03)” on page 21. data decimal correspond to other vendors data 9 in decimal represents Intersil ID data decimal are reserved data 15 in decimal Manufacturer ID is not implemented REV[2..0] = Silicon rev (Rev 0 through Rev 7 allowed for ...
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REGISTER 0x07 DC BRIGHTNESS CONTROL REGISTER BRTDC7 BRTDC6 BRTDC5 Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) BIT ASSIGNMENT = 256 steps of DC brightness levels BRTDC[7..0] FIGURE 27. DESCRIPTIONS OF DC BRIGHTNESS CONTROL REGISTER DC Brightness Control Register ...
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REGISTER 0x09 OUTPUT CHANNEL REGISTER CH7 CH6 CH5 Bit 7 (R/W) Bit 6 (R/W) Bit 5 (R/W) BIT ASSIGNMENT CH[7..0] CH7 = Channel 7, CH6 = Channel 6 and so on Components Selections According to the inductor Voltage-Second Balance principle, ...
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The ripple voltage can be shown as Equation 21: Δ ⁄ × ⁄ × ESR = + The conservation of charge principle also ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
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Q1 VIN 10µ/25V 0.1µ/25V FDMA530PZ C20 JP26 C10 33n VLOGIC R7 C12 R5 R6 500 0.1µ/10V 10k 10k C11 1µ/10V 1 SMBCLK PGND SMBCLK 2 SMBDAT SMBDAT PGND C13 27n/6.3V 3 FPWM ISL97635 C14 4 220n/6.3V ...
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Package Outline Drawing L24.4x4D 24 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 10/06 4.00 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 28 ISL97635 ...