MAX7302ATE+T Maxim Integrated Products, MAX7302ATE+T Datasheet - Page 24
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MAX7302ATE+T
Manufacturer Part Number
MAX7302ATE+T
Description
IC LED DRIVER LINEAR 16-TQFN
Manufacturer
Maxim Integrated Products
Type
Linear (I²C Interface)r
Datasheet
1.MAX7302AEE.pdf
(30 pages)
Specifications of MAX7302ATE+T
Topology
Open Drain, PWM
Number Of Outputs
9
Internal Driver
Yes
Type - Primary
Backlight, LED Blinker
Type - Secondary
White LED
Frequency
1MHz
Voltage - Supply
1.62 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Operating Temperature
-40°C ~ 125°C
Current - Output / Channel
25mA
Internal Switch(s)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Output
-
Efficiency
-
Lead Free Status / Rohs Status
Details
SMBus/I
Level-Translating GPIO and LED Driver with CLA
If the MAX7302 is operated on a 2-wire interface with
multiple masters, a master reading the MAX7302
should use a repeated start between the write that sets
the MAX7302’s address pointer, and the read(s) that
takes the data from the location(s). This is because it is
possible for master 2 to take over the bus after master
1 has set up the MAX7302’s address pointer, but
before master 1 has read the data. If master 2 subse-
quently changes the MAX7302’s address pointer, then
master 1’s delayed read can be from an unexpected
location.
Figure 16. Write to Output Port Registers
Figure 17. Read from Input Port Registers
Figure 18. Interrupt and Reset Timing
24
P9 TO P1
P9 TO P1
P9 TO P1
SDA
SCL
SCL
SDA
INT
SDA
SCL
______________________________________________________________________________________
READ FROM INPUT PORTS REGISTERS
START CONDITION
INTERRUPT VALID/RESET
WRITE TO OUTPUT PORTS REGISTERS
(P4)
START CONDITION
START CONDITION
S
S
S
1
1
1
1
1
1
2
0
2
0
2
DATA1
0
3
0
SLAVE ADDRESS
3
3
0
0
2
DATA1
4
1
C Interfaced 9-Port,
Operation with Multiple Masters
4
4
1
1
5
1
5
5
1
1
6
A1
A1
6
t
6
A1
IV
7
A0
A0
7
A0
7
R/W
8
R/W
1
R/W
8
0
8
1
t
PH
9
A
ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM SLAVE
9
A
9
A
ACKNOWLEDGE FROM SLAVE
DATA2
MSB
0
MSB
DATA2
0
t
IR
0
COMMAND BYTE
0
DATA1
DATA2
0
t
IV
Clear device configuration register 0x27 bit D7 to
enable the bus timeout function (see Table 4), or set it
to disable the bus timeout function. Enabling the time-
out feature resets the MAX7302 serial-bus interface
when SCL stops either high or low during a read or
write. If either SCL or SDA is low for more than nominal-
ly 31ms after the start of a valid serial transfer, the inter-
face resets itself and sets up SDA as an input. The
MAX7302 then waits for another START condition.
DATA3
1
0
t
PSU
LSB
0
LSB
ACKNOWLEDGE FROM SLAVE
A
A
ACKNOWLEDGE FROM MASTER
ACKNOWLEDGE FROM MASTER
A
MSB
MSB
MSB
DATA3
t
IR
DATA
DATA4
DATA4
DATA3
LSB
Bus Timeout
LSB
ACKNOWLEDGE
LSB
t
PPV
NO ACKNOWLEDGE
A
A
NO ACKNOWLEDGE
NA
DATA VALID
NA
STOP
STOP
P
P
STOP
P