LM5060Q1MM/NOPB National Semiconductor, LM5060Q1MM/NOPB Datasheet - Page 12

• Manufacturer Part Number: LM5060Q1MM/NOPB
• Description: IC CTRL HIGH SIDE AUTO 10MSOP
• Manufacturer: National Semiconductor

Specifications of LM5060Q1MM/NOPB

• Configuration: High-Side
• Voltage - Supply: 5 V ~ 65 V
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Applications: Automotive Body Electronics, Industrial Power Distribution And Control
• Input Voltage: 65V
• Supply Voltage Range: 5.5V To 65V
• Digital Ic Case Style: MSOP
• No. Of Pins: 10
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of Outputs: -
• Input Type: -
• Delay Time: -
• Current - Peak: -
• Number Of Configurations: -
• High Side Voltage - Max (bootstrap): -
• Other names: LM5060Q1MMTR

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EN UVLO
H
H
H
H
H
H
L
L
TABLE 1. Overview of Operating Conditions
Note †: The 2.2 mA sink current is valid for with the VIN pin
in
GATE CONTROL
A charge pump provides bias voltage above the input and
output voltage to enhance the N-Channel MOSFET’s gate.
When the system voltage is initially applied and both EN and
UVLO are above their respective thresholds, the GATE pin is
charged by the 24 µA (typical) current source. During normal
operating conditions, the GATE pin voltage is clamped to ap-
proximately 16.8V above the OUT pin (i.e. V
zener.
When either the UVLO input or the EN input is low, or when
VIN is below the Power-On Reset voltage of 5.10V (typical),
the GATE pin is discharged with a 2.2 mA (typical) current
sink.
Typical Performance
H
H
H
H
H
L
L
L
OVP
(typ)
<2V
>2V
<2V
<2V
>2V
<2V
-
-
Input Conditions
Characteristics.
>5.10V
>5.10V
>5.10V
>5.10V
>5.10V
>5.10V
>5.10V
<5.10V
(typ)
VIN
SENSE>OUT
SENSE<OUT
SENSE>OUT
SENSE<OUT
SENSE>OUT
SENSE<OUT
SENSE>OUT
SENSE<OUT
SENSE>OUT
SENSE<OUT
SENSE-OUT
NA
NA
NA
FIGURE 2. Voltages During Normal Start Up Sequence
GS
GATE-
) by an internal
OUT
<5V
>5V
NA
NA
NA
NA
NA
NA
≥
5.1V. When the VIN pin < 5.1V the sink current is lower. See ‘GATE Pin Off Current vs. VIN’ plot
0.009 mA
0.009 mA
0.56 mA
0.56 mA
Current
1.4 mA
1.4 mA
1.4 mA
1.4 mA
(typ)
VIN
12
GATE Current
24 µA source
24 µA source
(See Note†)
2.2 mA sink
2.2 mA sink
2.2 mA sink
2.2 mA sink
80 mA sink
80 mA sink
When the timer capacitor is charged up to the V
(typically 2V) a fault condition is indicated and the gate of the
external N-Channel MOSFET is discharged at a 80 mA (typ-
ical) rate . Additionally, when the OVP pin voltage is higher
than the OVP
the gate of the external N-Channel MOSFET is discharged at
the same 80 mA (typical) rate.
FAULT TIMER
An external capacitor connected from the TIMER pin to the
GND pin sets the fault detection delay time. If the voltage on
the TIMER capacitor reaches the V
a fault condition is indicated. The LM5060 will latch off the
MOSFET by discharging the GATE pin at a 80mA (typical)
(typ)
TH
Outputs
6 µA source
threshold (typically 2V) a fault is indicated and
TIMER
source
11 µA
Low
Low
Low
Low
Low
Low
Low
Low
TIMER > 2V
GATE after
80 mA sink
80 mA sink
30104223
TMRH
NA
NA
NA
NA
NA
NA
NA
NA
threshold (2V typical)
nPG
TMRH
NA
NA
D
H
H
H
H
H
H
L
L
L
L
L
threshold
Power on
Disabled
Disabled
Standby
Standby
Enabled
Enabled
Voltage
Status
reset
Over