LM5060Q1MM/NOPB National Semiconductor, LM5060Q1MM/NOPB Datasheet - Page 13

• Manufacturer Part Number: LM5060Q1MM/NOPB
• Description: IC CTRL HIGH SIDE AUTO 10MSOP
• Manufacturer: National Semiconductor

Specifications of LM5060Q1MM/NOPB

• Configuration: High-Side
• Voltage - Supply: 5 V ~ 65 V
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Applications: Automotive Body Electronics, Industrial Power Distribution And Control
• Input Voltage: 65V
• Supply Voltage Range: 5.5V To 65V
• Digital Ic Case Style: MSOP
• No. Of Pins: 10
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Operating Temperature: -
• Number Of Outputs: -
• Input Type: -
• Delay Time: -
• Current - Peak: -
• Number Of Configurations: -
• High Side Voltage - Max (bootstrap): -
• Other names: LM5060Q1MMTR

rate, and will remain latched off until either the EN pin, the
UVLO pin, or the VIN pin is toggled low and then high.
The block diagram of the LM5060 shows the details of the
TIMER pin. There are three relevant components to the
TIMER pin’s function:
1.
2.
3.
During Start-Up, the timer behaves as follows:
After applying sufficient system voltage and enabling the
LM5060 by pulling the EN and UVLO pins high, the timer ca-
pacitor will be charged with a 6 µA (typical) current source.
The timer capacitor is discharged when the voltage difference
between the GATE pin and the OUT pin (i.e. V
ternal N-Channel MOSFET) reaches the V
(typically 5V). After discharging, the timer capacitor is
charged with 11 µA until either the V
2V) is reached, or the sensed V
threshold of the V
voltage has reached the desired steady state level. The timer
capacitor voltage waveforms are illustrated in
3
A timer capacitor is always necessary to allow some finite
amount of time for the gate to charge and the output voltage
to rise during startup. If an adequate timer capacitor value is
not used, then the 6 µA of charge current would cause the
TIMER pin voltage to reach the V
2V) prematurely and the LM5060 will latch off since a fault
condition would have been indicated.
and
A constant 6 µA (typical) current source driving the
TIMER pin. This current source is active when EN,
UVLO, and VIN are all high.
A second current source (5 µA typical) is activated, for a
total charge current of 11 µA (typical), only when the
V
A pull-down current sink for the TIMER pin which resets
the timer by discharging the timer capacitor. If EN, UVLO
or VIN is low, or when OVP is high, the timer capacitor is
discharged.
When the V
pin voltage higher than OUT pin voltage) the timer
capacitor pull down is disabled and the timer capacitor is
allowed to charge at the 11 µA (typical) rate.
GS
Figure
sequence has completed successfully.
4.
DS
DS
Fault Comparator detects a fault, (SENSE
Fault Comparator, indicating the output
FIGURE 3. Voltages During Startup with V
TMRH
DS
TMRH
voltage falls below the
fault threshold (typically
threshold (typically
GATE-TH
Figure
GS
of the ex-
threshold
2,
Figure
13
Although not recommended, the timer function can be dis-
abled by connecting the TIMER pin directly to GND. With this
condition the TIMER pin voltage will never reach the V
fault threshold (2V typical). The end result is that the fault
latch-off protection is completely disabled, while the nPGD pin
will continue to reflect the V
V
The V
gram accomplishes two purposes:
1.
2.
GS
GS
CONSIDERATIONS
As the gate of the external MOSFET is charged, the
V
region, and into the ohmic region. The LM5060 provides
two fault timer modes to monitor these transitions. The
TIMER pin capacitor is initially charged with a constant
6 µA (typical) until either the MOSFET V
V
MOSFET channel is at least somewhat enhanced, or the
voltage on the TIMER pin reaches the V
(typically 2V) indicating a fault condition. If the MOSFET
V
the typical 2V timer fault threshold, the timer capacitor is
then discharged to 300 mV, and then begins charging
with 11 µA current source while the MOSFET transitions
through the active region. The lower timer capacitor
charge current during the initial start-up sequence allows
more time before a fault is indicated. The turn-on time of
the MOSFET will vary with input voltage, load
capacitance, load resistance, as well as the MOSFET
characteristics.
Figure 3
leakage. The initial charge current on the timer capacitor
is 6 µA (typical), while the simultaneous charge current
to the gate is 24 µA (typical). Due to excessive gate
leakage, the 24 µA is not able to charge the gate to the
required typical 5V V
Comparator will indicate a fault when the timer capacitor
is charged to the V
capacitor voltage reaches theV
(typically 2V) the MOSFET gate is discharged at an 80
mA (typical) rate.
GS
GS
GATE–TH
GS
Gate Leakage Condition
Status Comparator shown in the LM5060 block dia-
voltage transitions from cut-off, through an active
reaches 5V threshold before the TIMER pin reaches
shows a start-up waveform with excessive gate
threshold (typically 5V) indicating that the
TMRH
GS
DS
threshold and the V
fault threshold. When the timer
Fault Comparator output.
TMRH
30104224
fault threshold
GS
TMRH
reaches the
DS
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threshold
Fault
TMRH