ISL6605CBZ Intersil, ISL6605CBZ Datasheet
ISL6605CBZ
Specifications of ISL6605CBZ
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ISL6605CBZ Summary of contents
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... LGATE CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Intel® registered trademark of Intel Corporation. AMD® registered trademark of Advanced Micro Devices, Inc. All other trademarks mentioned are the property of their respective owners. ...
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... Ordering Information PART PART TEMP. NUMBER* MARKING RANGE (°C) ISL6605CB ISL6605CB ISL6605CBZ ISL6605CBZ (Note) ISL6605CBZA ISL6605CBZ (Note) ISL6605CR 605C ISL6605CRZ 05CZ (Note) ISL6605CRZA 05CZ (Note) ISL6605IB ISL6605IB - ISL6605IBZ 6605IBZ - (Note) Block Diagram VCC EN VCC PWM 2 ISL6605 Ordering Information PART PKG. NUMBER* PACKAGE DWG ...
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Typical Application - Multi-Phase Converter Using ISL6605 Gate Drivers +5V +5V FB COMP VCC VSEN PWM1 PWM2 PGOOD PWM CONTROL (HIP63XX or ISL65XX) ISEN1 VID (OPTIONAL) ISEN2 FS/EN GND * 499K IS USED TO PULL DOWN THE PWM INPUT TO ...
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Absolute Maximum Ratings Supply Voltage (VCC -0. Input Voltage ( ...
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Functional Pin Description Note: Pin numbers refer to the SOIC package. Check PINOUT diagrams for QFN pin numbers. UGATE (Pin 1) Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET. BOOT (Pin 2) Floating bootstrap supply pin ...
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... MOSFET and prevent a shoot through caused by the high dv/dt of the phase node. Three-State PWM Input A unique feature of the ISL6605 and other Intersil drivers is the addition of a shutdown window to the PWM input. If the PWM signal enters and remains within the shutdown window for a set holdoff time, the output drivers are disabled and both MOSFET gates are pulled and held low ...
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Q =50nC Q =100nC =100nC 900 900 L Q =200nC L 800 800 700 700 600 600 500 500 400 400 300 300 200 200 100 100 200 400 600 800 ...
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... Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...