LTC1255CS8 Linear Technology, LTC1255CS8 Datasheet - Page 5

• Manufacturer Part Number: LTC1255CS8
• Description: IC MOSFET DVR HI-SIDE DUAL 8SOIC
• Manufacturer: Linear Technology

Specifications of LTC1255CS8

• Configuration: High-Side
• Input Type: Non-Inverting
• Delay Time: 180µs
• Number Of Configurations: 2
• Number Of Outputs: 2
• Voltage - Supply: 9 V ~ 24 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Peak: -
• High Side Voltage - Max (bootstrap): -

OPERATIO
PI FU CTIO S
Input Pin
The LTC1255 input pin is active high and activates all of
the protection and charge pump circuitry when switched
ON. The LTC1255 logic and shutdown inputs are high
impedance CMOS gates with ESD protection diodes to
ground and supply and therefore should not be forced
beyond the power supply rails. The input pin should be
held low during the application of power to properly set
the input latch.
Gate Drive Pin
The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail
when the switch is turned ON. This pin is of relatively
high impedance when driven above the rail (the equiva-
lent of a few hundred k ). Care should be taken to
minimize any loading of this pin by parasitic resistance
to ground or supply.
Supply Pin
The supply pin of the LTC1255 serves two vital pur-
poses. The first is obvious; it powers the input, gate
drive, regulation and protection circuitry. The second
purpose is less obvious; it provides a Kelvin connection
to the top of the drain sense resistor for the internal
100mV reference.
The supply pin of the LTC1255 should never be forced
below ground as this may result in permanent damage
to the device . A 100
series with the ground pin if negative supply voltage
transients are anticipated.
The LTC1255 is a dual 24V MOSFET driver with built-in
protection and gate charge pump. The LTC1255 consists
of the following functional blocks:
TTL and CMOS Compatible Inputs and Latches
The LTC1255 inputs have been designed to accommo-
date a wide range of logic families. Both input thresh-
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resistor should be inserted in
The LTC1255 is designed to be continuously powered
so that the gate of the MOSFET is actively driven at all
times. If it is necessary to remove power from the
supply pin and then reapply it, the input pin should be
cycled (low to high) a few milliseconds after the power
is reapplied to reset the input latch and protection
circuitry. Also, the input pin should be isolated from the
controlling logic by a 10k resistor if there is a possibility
that the input pin will be held high after the supply has
been removed.
Drain Sense Pin
The drain sense pin is compared against the supply pin
voltage. If the voltage at this pin is more than 100mV
below the supply pin, the input latch will be reset and
the MOSFET gate will be quickly discharged. Cycle the
input to reset the short-circuit latch and turn the MOSFET
back on.
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced outside
of the power supply rails. To defeat the overcurrent
protection, short the drain sense pin to the supply pin.
Some loads, such as large supply capacitors, lamps or
motors require high in-rush currents. An RC time delay
can be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does
not false trigger during startup. This time constant can
be set from a few microseconds to many seconds.
However, very long delays may put the MOSFET at risk
of being destroyed by a short-circuit condition (see
Applications Information section).
olds are set at about 1.3V with approximately 100mV of
hysteresis. A low standby current regulator provides
continuous bias for the TTL-to-CMOS converter.
The input/protection latch should be set after initial
power-up, or after reapplication of power, by cycling
the input low to high.
LTC1255
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