ISL6610CRZ-T Intersil, ISL6610CRZ-T Datasheet - Page 5

• Manufacturer Part Number: ISL6610CRZ-T
• Description: IC MOSFET DRVR DUAL SYNC 16-QFN
• Manufacturer: Intersil

Specifications of ISL6610CRZ-T

• Configuration: High and Low Side, Synchronous
• Input Type: PWM
• Delay Time: 18ns
• Number Of Configurations: 2
• Number Of Outputs: 4
• High Side Voltage - Max (bootstrap): 36V
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Peak: -

Electrical Specifications
NOTE:
Functional Pin Description
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
Tri-state to UG/LG Rising Propagation Delay
OUTPUT (Note 4)
Upper Drive Source Resistance
Upper Drive Sink Resistance
Lower Drive Source Resistance
Lower Drive Sink Resistance
4. Guaranteed by Characterization. Not 100% tested in production.
PACKAGE PIN #
SOIC
10
11
12
13
14
1
2
3
4
5
6
7
8
9
-
-
DFN
5,8
15
16
10
11
12
13
14
17
1
2
3
4
6
7
9
PARAMETER
SYMBOL
PHASE2
UGATE2
UGATE1
PHASE1
LGATE1
LGATE2
BOOT2
BOOT1
PWM1
PWM2
PVCC
PGND
NC1,2
GND
VCC
PAD
PIN
The PWM signal is the control input for the Channel 1 driver. The PWM signal can enter three distinct states during
operation, see the Tri-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM
output of the controller.
The PWM signal is the control input for the Channel 2 driver. The PWM signal can enter three distinct states during
operation, see the Tri-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM
output of the controller.
Bias and reference ground. All signals are referenced to this node.
Lower gate drive output of Channel 1. Connect to gate of the low-side power N-Channel MOSFET.
This pin supplies power to both the lower and higher gate drives. Place a high quality low ESR ceramic capacitor
from this pin to PGND.
Power ground return of both low gate drivers.
No connection.
Lower gate drive output of Channel 2. Connect to gate of the low-side power N-Channel MOSFET.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 2. This
pin provides a return path for the upper gate drive.
Upper gate drive output of Channel 2. Connect to gate of high-side power N-Channel MOSFET.
Floating bootstrap supply pin for the upper gate drive of Channel 2. Connect the bootstrap capacitor between this
pin and the PHASE2 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the
Internal Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
Floating bootstrap supply pin for the upper gate drive of Channel 1. Connect the bootstrap capacitor between this
pin and the PHASE1 pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See the
Internal Bootstrap Device section under DESCRIPTION for guidance in choosing the capacitor value.
Upper gate drive output of Channel 1. Connect to gate of high-side power N-Channel MOSFET.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET in Channel 1. This
pin provides a return path for the upper gate drive.
Connect this pin to a +5V bias supply. It supplies power to internal analog circuits. Place a high quality low ESR
ceramic capacitor from this pin to GND.
Connect this pad to the power ground plane (GND) via thermally enhanced connection.
5
These specifications apply for T
R
R
SYMBOL
R
R
UG_SRC
UG_SNK
t
LG_SRC
LG_SNK
t
PDHU
PDHL
t
PTS
ISL6610, ISL6610A
Outputs Unloaded
Outputs Unloaded
Outputs Unloaded
250mA Source Current
250mA Sink Current
250mA Source Current
250mA Sink Current
A
= -40°C to +85°C, unless otherwise noted (Continued)
TEST CONDITIONS
FUNCTION
MIN
-
-
-
-
-
-
-
TYP
1.0
1.0
1.0
0.4
18
23
20
MAX
2.5
2.5
2.5
1.0
-
-
-
November 22, 2006
UNITS
FN6395.0
ns
ns
ns
Ω
Ω
Ω
Ω