ISL83202IBZT Intersil, ISL83202IBZT Datasheet
ISL83202IBZT
Specifications of ISL83202IBZT
Related parts for ISL83202IBZT
ISL83202IBZT Summary of contents
Page 1
... PART TEMP. NUMBER MARKING RANGE (°C) ISL83202IBZ 83202IBZ -55 to +125 16 Ld SOIC (N) (Note) ISL83202IBZT 16 Ld SOIC (N) Tape and Reel (Note) (Pb-free) ISL83202IPZ ISL83202IPZ -55 to +125 16 Ld PDIP** (Note) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
Page 2
Application Block Diagram 12V BHI BLI ISL83202 ALI AHI GND Functional Block Diagram BHI 2 AHI 7 DIS 8 DETECTOR UNDERVOLTAGE ALI 4 DEL 5 BLI ISL83202 55V BHO BHS LOAD BLO ...
Page 3
Typical Application (PWM Mode Switching 12V 3 PWM 4 INPUT 5 DELAY RESISTOR DIS GND FROM OPTIONAL OVERCURRENT LATCH R DIS TO OPTIONAL CURRENT CONTROLLER OR OVERCURRENT LATCH 3 ISL83202 16 BHB BHO 15 BHI ...
Page 4
Absolute Maximum Ratings Supply Voltage -0.3V to 16V DD Logic I/O Voltages ...
Page 5
Electrical Specifications PARAMETER GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, and BHO Low Level Output Voltage High Level Output Voltage Peak Pullup Current Peak Pulldown Current Switching Specifications PARAMETER Lower Turn-off Propagation ...
Page 6
Pin Descriptions PIN NUMBE R SYMBOL 1 BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode and positive side of bootstrap capacitor to this pin. 2 BHI B High-side Input. Logic level ...
Page 7
Timing Diagrams AND B HALVES OF BRIDGE CONTROLLER ARE INDEPENDENT T LPHL DIS=0 and UV XLI XHI XLO XHO T HPLH DIS=0 and UV XLI XHI = HI OR NOT CONNECTED XLO XHO T ...
Page 8
Performance Curves 3.5 3. 16V 15V DD 3 2.75 2 12V DD 2. 10V 1.75 1.5 -60 -40 - JUNCTION TEMPERATURE ...
Page 9
Performance Curves (Continued) 1.4 1.2 -40°C 0°C +25°C -55°C 1 0.8 +125°C +150°C 0 SUPPLY VOLTAGE (V) DD FIGURE 10 BIAS VOLTAGE AND TEMPERATURE OL 100 90 80 UPPER ...
Page 10
Performance Curves (Continued) FIGURE 16. DEAD-TIME vs DEL RESISTANCE AND BIAS SUPPLY (V 10 ISL83202 1000 100 DEAD TIME RESISTANCE (kΩ 15V DD ...
Page 11
Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...
Page 12
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...