ISL83202IPZ Intersil, ISL83202IPZ Datasheet - Page 6

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ISL83202IPZ

Manufacturer Part Number
ISL83202IPZ
Description
IC FET DRIVER H-BRIDGE 1A 16-DIP
Manufacturer
Intersil
Datasheet

Specifications of ISL83202IPZ

Configuration
H Bridge
Input Type
Inverting and Non-Inverting
Delay Time
75ns
Current - Peak
1A
Number Of Configurations
1
Number Of Outputs
4
High Side Voltage - Max (bootstrap)
70V
Voltage - Supply
8.5 V ~ 15 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Pin Descriptions
NUMBE
PIN
10
12
13
14
15
16
11
R
1
2
3
4
5
6
7
8
9
SYMBOL
AHO
BHO
BHB
AHB
AHS
ALO
BLO
BHS
DEL
V
V
BHI
AHI
DIS
BLI
ALI
SS
DD
B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode
and positive side of bootstrap capacitor to this pin.
B High-side Input. Logic level input that controls BHO driver (Pin 16). BLI (Pin 3) high level input overrides BHI high level
input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides BHI high level input. The
pin can be driven by signal levels of 0V to 15V (no greater than V
B Low-side Input. Logic level input that controls BLO driver (Pin 14). If BHI (Pin 2) is driven high or not connected externally
then BLI controls both BLO and BHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin 8) high level
input overrides BLI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than V
A Low-side Input. Logic level input that controls ALO driver (Pin 13). If AHI (Pin 7) is driven high or not connected externally
then ALI controls both ALO and AHO drivers, with dead time set by delay currents at DEL (Pin 5). DIS (Pin 8) high level
input overrides ALI high level input. The pin can be driven by signal levels of 0V to 15V (no greater than V
Turn-on DELay. Connect resistor from this pin to V
drivers turn-off with no adjustable delay, so the DEL resistor guarantees no shoot-through by delaying the turn-on of all
drivers. The voltage across the DEL resistor is approximately V
Chip negative supply, generally will be ground.
A High-side Input. Logic level input that controls AHO driver (Pin 10). ALI (Pin 4) high level input overrides AHI high level
input to prevent half-bridge shoot-through, see Truth Table. DIS (Pin 8) high level input overrides AHI high level input. The
pin can be driven by signal levels of 0V to 15V (no greater than V
DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs. When
DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of 0V to 15V (no
greater than V
A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of bootstrap diode
and positive side of bootstrap capacitor to this pin.
A High-side Output. Connect to gate of A High-side power MOSFET.
A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
Positive supply to control logic and lower gate drivers. De-couple this pin to V
A Low-side Output. Connect to gate of A Low-side power MOSFET.
B Low-side Output. Connect to gate of B Low-side power MOSFET.
B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of bootstrap
capacitor to this pin.
B High-side Output. Connect to gate of B High-side power MOSFET.
6
DD
).
ISL83202
ISL83202
SS
DESCRIPTION
to set timing current that defines the dead time between drivers. All
DD
DD
DD
-2V.
).
).
SS
(Pin 6).
DD
DD
December 20, 2006
).
).
FN6382.0

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