ISL2111AR4Z-T Intersil, ISL2111AR4Z-T Datasheet

ISL2111AR4Z-T

Manufacturer Part Number

ISL2111AR4Z-T

Description

IC MSFT DVR HALF-BRG 100V 12-DFN

Manufacturer

Intersil

Datasheet

1.ISL2111ABZ.pdf (12 pages)

Specifications of ISL2111AR4Z-T

Configuration

Half Bridge

Input Type

Non-Inverting

Delay Time

38ns

Current - Peak

Number Of Configurations

Number Of Outputs

High Side Voltage - Max (bootstrap)

100V

Voltage - Supply

8 V ~ 14 V

Operating Temperature

-40°C ~ 125°C

Mounting Type

Surface Mount

Package / Case

12-DFN

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current page: 1 of 12
Download datasheet (277Kb)

100V, 3A/4A Peak, High Frequency

Half-Bridge Drivers

The ISL2110, ISL2111 are 100V, high frequency, half-bridge

N-Channel power MOSFET driver ICs. They are based on

the popular HIP2100, HIP2101 half-bridge drivers, but offer

several performance improvements. Peak output pull-up/

pull-down current has been increased to 3A/4A, which

significantly reduces switching power losses and eliminates

the need for external totem-pole buffers in many

applications. Also, the low end of the V

range has been extended to 8VDC. The ISL2110 has

additional input hysteresis for superior operation in noisy

environments and the inputs of the ISL2111, like those of the

ISL2110, can now safely swing to the V

Ordering Information

ISL2110ABZ*

ISL2110AR4Z* 211 0AR4Z -40 to +125 12 Ld 4x4 DFN L12.4x4A

ISL2111ABZ*

ISL2111AR4Z* 211 1AR4Z -40 to +125 12 Ld 4x4 DFN L12.4x4A

ISL2111ARTZ* 211 1ARTZ -40 to +125 10 Ld 4x4 TDFN L10.4x4

*Add “-T” suffix for Tape and Reel packing option. Please refer to

TB347 for details on reel specifications

NOTE: These Intersil Pb-free plastic packaged products employ

special Pb-free material sets, molding compounds/die attach

materials, and 100% matte tin plate plus anneal (e3 termination finish,

which is RoHS compliant and compatible with both SnPb and Pb-free

soldering operations). Intersil Pb-free products are MSL classified at

Pb-free peak reflow temperatures that meet or exceed the Pb-free

requirements of IPC/JEDEC J STD-020

NUMBER

(Note)

PART

2110 ABZ

2111 ABZ

MARKING

PART

-40 to +125 8 Ld SOIC

RANGE

TEMP

(°C)

Data Sheet

PACKAGE

(Pb-Free)

operational supply

supply rail.

M8.15

1-888-INTERSIL or 1-888-468-3774

DWG. #

PKG.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• Drives N-Channel MOSFET Half-Bridge

• SOIC, DFN and TDFN Package Options

• SOIC, DFN and TDFN Packages Compliant with 100V

• Pb-Free (RoHS Compliant)

• Bootstrap Supply Max Voltage to 114VDC

• On-Chip 1Ω Bootstrap Diode

• Fast Propagation Times for Multi-MHz Circuits

• Drives 1nF Load with Typical Rise/Fall Times of 9ns/7.5ns

• CMOS Compatible Input Thresholds (ISL2110)

• 3.3V/TTL Compatible Input Thresholds (ISL2111)

• Independent Inputs Provide Flexibility

• No Start-Up Problems

• Outputs Unaffected by Supply Glitches, HS Ringing Below

• Low Power Consumption

• Wide Supply Voltage Range (8V to 14V)

• Supply Undervoltage Protection

• 1.6Ω/1Ω Typical Output Pull-Up/Pull-Down Resistance

Applications

• Telecom Half-Bridge DC/DC Converters

• Telecom Full-Bridge DC/DC Converters

• Two-Switch Forward Converters

• Active-Clamp Forward Converters

• Class-D Audio Amplifiers

Conductor Spacing Guidelines per IPC-2221

Ground or HS Slewing at High dv/dt

August 11, 2009

All other trademarks mentioned are the property of their respective owners.

Intersil (and design) is a registered trademark of Intersil Americas Inc.

ISL2110, ISL2111

FN6295.4

Related parts for ISL2111AR4Z-T

ISL2111AR4Z-T Summary of contents

Page 1

... ISL2111ABZ* 2111 ABZ -40 to +125 8 Ld SOIC ISL2111AR4Z* 211 1AR4Z -40 to +125 12 Ld 4x4 DFN L12.4x4A ISL2111ARTZ* 211 1ARTZ -40 to +125 10 Ld 4x4 TDFN L10.4x4 *Add “-T” suffix for Tape and Reel packing option. Please refer to TB347 for details on reel specifications ...

Page 2

Pinouts ISL2111 (10 LD 4X4 TDFN) TOP VIEW VDD Application Block Diagram PWM CONTROLLER 2 ISL2110, ISL2111 VSS ISL2110, ISL2111 (8 LD ...

Page 3

Functional Block Diagram ISL2111 ISL2111 *EPAD = Exposed Pad. The EPAD is electrically isolated from all other pins. For best thermal performance connect the EPAD to the PCB power ground plane. +12V PWM +12V ...

Page 4

... Max Power Dissipation at +25°C in Free Air 8 Ld SOIC (Note 1. TDFN (Notes 3. DFN (Notes 3.1W Storage Temperature Range . . . . . . . . . . . . . . . . . . . -65°C to +150°C Junction Temperature Range .-55°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp - 100V 12V 0V, No Load HO, Unless Otherwise Specified. ...

Page 5

Electrical Specifications PARAMETERS SYMBOL UNDERVOLTAGE PROTECTION V Rising Threshold Threshold Hysteresis Rising Threshold V HB Threshold Hysteresis V BOOT STRAP DIODE Low Current Forward Voltage High Current Forward Voltage Dynamic ...

Page 6

Pin Descriptions SYMBOL V Positive supply to lower gate driver. Bypass this pin High-side bootstrap supply. External bootstrap capacitor is required. Connect positive side of bootstrap capacitor to this pin. Bootstrap diode is on-chip. HO High-side ...

Page 7

Typical Performance Curves 10 -40°C 1 +25°C 0 +125°C 0.01 10k 100k FREQUENCY (Hz) FIGURE 7. I OPERATING CURRENT vs FREQUENCY HB 300 14V DD HB 250 200 150 100 ...

Page 8

Typical Performance Curves LPLH HPLH HPHL 25 - TEMPERATURE (°C) FIGURE 13. ISL2110 PROPAGATION DELAYS vs TEMPERATURE 8.0 7.5 t MON 7.0 6.5 6.0 5.5 5.0 4.5 4.0 -50 ...

Page 9

Typical Performance Curves 120 110 I DD 100 ( FIGURE 19. ISL2110 QUIESCENT CURRENT vs VOLTAGE 1.00 0.10 0. ...

Page 10

Package Outline Drawing L10.4x4 10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 1, 1/08 4. 4.00 TOP VIEW ( 3. 3.80 TYPICAL RECOMMENDED LAND PATTERN 10 ISL2110, ISL2111 PIN ...

Page 11

... Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. COMPLIANT TO JEDEC MO-229-VGGD-2 ISSUE C except for the L dimension TERMINAL TIP MILLIMETERS ...

Page 12

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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