IR1167ASPBF International Rectifier, IR1167ASPBF Datasheet - Page 7
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IR1167ASPBF
Manufacturer Part Number
IR1167ASPBF
Description
IC MOSFET DRIVER N-CHAN 8-SOIC
Manufacturer
International Rectifier
Series
SmartRectifier™r
Datasheet
1.IR1167ASPBF.pdf
(16 pages)
Specifications of IR1167ASPBF
Configuration
Low-Side
Input Type
Self Oscillating
Delay Time
60ns
Current - Peak
2A
Number Of Configurations
1
Number Of Outputs
1
Voltage - Supply
12 V ~ 18 V
Operating Temperature
-25°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Part Status
Active and Preferred
Package
8-Pin SOIC(NB)
Circuit
Switching Regulator Controller
Topology
Flyback / Resonant Half-Bridge
Current Mode
Discontinuous / Critical / Continuous
Vcc (min)
11.4
Vcc (max)
18
Vout (max)
200
Iout (a)
+2 / -7
Switch Freq (khz)
up to 500kHz
Vgate Clamp (v)
10.7
Programmability
MOT / OVT
Enable Pin
Yes
Isleep (ua)
200
Automatic Mot Protection
No
Pbf
PbF Option Available
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High Side Voltage - Max (bootstrap)
-
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Part Number
Manufacturer
Quantity
Price
STATES OF OPERATION
UVLO/Sleep Mode
The IC remains in the UVLO condition until the voltage
on the VCC pin exceeds the VCC turn on threshold
voltage, V
During the time the IC remains in the UVLO state, the
gate drive circuit is inactive and the IC draws a
quiescent current of I
accessible from any other state of operation whenever
the IC supply voltage condition of VCC < V
occurs.
The sleep mode is initiated by pulling the EN pin below
2.5V (typ). In this mode the IC is essentially shut down
and draws a very low quiescent supply current.
Normal Mode
The IC enters in normal operating mode once the
UVLO voltage has been exceeded. At this point the
gate driver is operating and the IC will draw a
maximum of I
www.irf.com
CC ON
CC
.
from the supply voltage source.
CC START
. The UVLO mode is
CC UVLO
GENERAL DESCRIPTION
The IR1167 Smart Rectifier IC can emulate the
operation of diode rectifier by properly driving a
Synchronous Rectifier (SR) MOSFET.
The direction of the rectified current is sensed by the
input comparator using the power MOSFET R
as a shunt resistance and the GATE pin of the
MOSFET is driven accordingly.
Internal blanking logic is used to prevent spurious
transitions and guarantee operation in continuous
(CCM), discountinuous (DCM) and critical (CrCM)
conduction mode.
The modes of operation for a Flyback circuit differ
mainly for the turn-off phase of the SR switch, while
the turn-on phase of the secondary switch (which
correspond to the turn off of the primary side switch)
is identical.
Turn-on phase
When the conduction phase of the SR FET is initiated,
current will start flowing through its body diode,
generating a negative V
diode has generally a much higher voltage drop than
the one caused by the MOSFET on resistance and
therefore will trigger the turn-on threshold V
At that point the IR1167 will drive the gate of MOSFET
on which will in turn cause the conduction voltage V
to drop down. This drop is usually accompained by
some amount of ringing, that can trigger the input
comparator to turn off; hence, a Minimum On Time
(MOT) blanking period is used that will maintain the
power MOSFET on for a minimum amount of time.
The programmed MOT will limit also the minimum duty
V
TH2
Input comparator thresholds
V
TH1
V
Gate
DS
IR1167AS/BS
voltage across it. The body
V
TH3
TH2
DSon
.
V
DS
DS
7