UDN2559B Allegro Microsystems Inc, UDN2559B Datasheet - Page 9

• Manufacturer Part Number: UDN2559B
• Description: IC DRIVER QUAD PROTECTED 16DIP
• Manufacturer: Allegro Microsystems Inc
• Type: Low Sider

Specifications of UDN2559B

• Input Type: Logic, AND
• Number Of Outputs: 4
• Current - Output / Channel: 700mA
• Current - Peak Output: 1A
• Voltage - Supply: 4.75 V ~ 5.25 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 16-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• On-state Resistance: -

2559
Copyright ©1995-2010, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifi cations as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
16X
0.10
0.41 ±0.10
C
16
1
For Reference Only
Pins 4 and 5, and 12 and 13 internally fused
Dimensions in millimeters
(reference JEDEC MS-013 AA)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
2
with internally fused pins 4 and 5, and 12 and 13
10.30±0.20
1.27
For the latest version of this document, visit our website:
LB Package, 16-pin SOICW
7.50±0.10
www.allegromicro.com
0.20 ±0.10
SEATING
PLANE
2.65 MAX
10.30±0.33
C
A Terminal #1 mark area
B
Reference pad layout (reference IPC SOIC127P1030X265-16M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
Protected Quad Power Driver
GAUGE PLANE
4° ±4
0.25
0.84
SEATING PLANE
0.27
+0.44
–0.43
+0.07
–0.06
0.65
2.25
16
1
B
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
2
PCB Layout Reference View
1.27
9.50
8