A4982SLPTR-T Allegro Microsystems Inc, A4982SLPTR-T Datasheet

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A4982SLPTR-T

Manufacturer Part Number
A4982SLPTR-T
Description
IC DRIVER MICROSTEPPING 24-TSSOP
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A4982SLPTR-T

Applications
Stepper Motor Driver
Number Of Outputs
2
Current - Output
2A
Voltage - Load
8 V ~ 35 V
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
Motor Type
Stepper
No. Of Outputs
2
Output Current
2A
Output Voltage
35V
Supply Voltage Range
3V To 5.5V
Driver Case Style
TSSOP
No. Of Pins
24
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
620-1352-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A4982SLPTR-T
Manufacturer:
ALLEGRO
Quantity:
2 000
Part Number:
A4982SLPTR-T
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Part Number:
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Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Features and Benefits
▪ Low R
▪ Automatic current decay mode detection/selection
▪ Mixed and Slow current decay modes
▪ Synchronous rectification for low power dissipation
▪ Internal UVLO
▪ Crossover-current protection
▪ 3.3 and 5 V compatible logic supply
▪ Thin profile QFN and TSSOP packages
▪ Thermal shutdown circuitry
▪ Short-to-ground protection
▪ Shorted load protection
▪ Low current Sleep mode, < 10 μA
▪ No smoke no fire (NSNF) compliance (ET package)
Packages
4982-DS Rev. 1
DS(ON)
:
with exposed thermal pad
outputs
with exposed thermal pad
5 mm × 5 mm × 0.90 mm
32-contact QFN
Microcontroller or
Controller Logic
24-pin TSSOP
(LP Package)
(ET package)
DMOS Microstepping Driver with Translator
0.22 μF
Typical Application Diagram
Approximate size
5 kΩ
V
DD
0.22 μF
VDD
SLEEP
VREF
STEP
MS1
MS2
DIR
ENABLE
RESET
VREG
The A4982 is a complete microstepping motor driver with
Description
built-in translator for easy operation. It is designed to operate
bipolar stepper motors in full-, half-, quarter-, and sixteenth-step
modes, with an output drive capacity of up to 35 V and ±2 A.
The A4982 includes a fixed off-time current regulator which
has the ability to operate in Slow or Mixed decay modes.
The ET package meets customer requirements for no smoke
no fire (NSNF) designs by adding no-connect pins between
critical output, sense, and supply pins. So, in the case of a
pin-to-adjacent-pin short, the device does not cause smoke
or fire. Additionally, the device does not cause smoke or fire
when any pin is shorted to ground or left open.
The translator is the key to the easy implementation of the
A4982. Simply inputting one pulse on the STEP input drives
the motor one microstep. There are no phase sequence tables,
high frequency control lines, or complex interfaces to program.
The A4982 interface is an ideal fit for applications where a
complex microprocessor is unavailable or is overburdened.
During stepping operation, the chopping control in the A4982
automatically selects the current decay mode, Slow or Mixed.
In Mixed decay mode, the device is set initially to a fast decay
for a proportion of the fixed off-time, then to a slow decay for
the remainder of the off-time. Mixed decay current control
Continued on the next page…
ROSC
And Overcurrent Protection
GND
A4982
CP1
0.1 μF
CP2
GND
VCP
SENSE1
SENSE2
OUT1B
OUT2B
OUT1A
OUT2A
0.1 μF
VBB1
VBB2
100 μF
A4982

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A4982SLPTR-T Summary of contents

Page 1

DMOS Microstepping Driver with Translator Features and Benefits ▪ Low R outputs DS(ON) ▪ Automatic current decay mode detection/selection ▪ Mixed and Slow current decay modes ▪ Synchronous rectification for low power dissipation ▪ Internal UVLO ▪ Crossover-current protection ▪ ...

Page 2

... Selection Guide Part Number A4982SETTR-T 32-pin QFN with exposed thermal pad A4982SLPTR-T 24-pin TSSOP with exposed thermal pad Absolute Maximum Ratings Characteristic Load Supply Voltage Output Current Logic Input Voltage ...

Page 3

A4982 VREG VDD Current Regulator REF DAC PWM Latch Blanking Mixed Decay STEP DIR RESET Control Translator MS1 Logic MS2 PWM Latch ENABLE Blanking Mixed Decay SLEEP DAC V REF DMOS Microstepping Driver with Translator Functional Block Diagram 0.22 F ...

Page 4

A4982 ELECTRICAL CHARACTERISTICS Characteristics Output Drivers Load Supply Voltage Range Logic Supply Voltage Range Output On Resistance Body Diode Forward Voltage Motor Supply Current Logic Supply Current Control Logic Logic Input Voltage Logic Input Current Microstep Select Logic Input Hysteresis ...

Page 5

A4982 THERMAL CHARACTERISTICS may require derating at maximum conditions Characteristic Symbol Package Thermal Resistance *In still air. Additional thermal information available on Allegro Web site. DMOS Microstepping Driver with Translator Test Conditions* ET package; estimated, on 4-layer PCB, based on ...

Page 6

A4982 STEP MS1, MS2, RESET, or DIR STEP minimum, HIGH pulse width STEP minimum, LOW pulse width Setup time, input change to STEP Hold time, input change to STEP Figure 1. Logic Interface Timing Diagram Table 1. Microstep Resolution Truth ...

Page 7

A4982 The A4982 is a complete microstepping Device Operation. motor driver with a built-in translator for easy operation with minimal control lines designed to operate bipolar step- per motors in full-, half-, quarter-, and sixteenth-step resolution modes. The ...

Page 8

A4982 Slow Mixed Decay Decay Missed Step Voltage on ROSC terminal 2 V/div. Step input 10 V/div. Figure 2. Missed steps in low-speed microstepping I 500 mA/div. LOAD Step input 10 V/div. Figure 3. Continuous stepping using automatically-selected mixed stepping ...

Page 9

A4982 The DAC output reduces the V output to the current sense REF comparator in precise steps, such that I = (%I / 100) trip TripMAX (See table 2 for %I at each step.) TripMAX It is critical that the ...

Page 10

A4982 ( ¯ S ¯ ¯ L ¯ ¯ E ¯ ¯ E ¯ ¯ P ¯ minimize power consumption Sleep Mode when the motor is not in use, this input disables much of the internal circuitry including ...

Page 11

A4982 V STEP 100.00 70.71 I OUT 0 –70.71 –100.00 I OUT Symbol I Figure 7. Current Decay Modes Timing Chart DMOS Microstepping Driver with Translator See Enlargement A Enlargement PEAK Characteristic t Device fixed off-time ...

Page 12

A4982 Layout. Typical application circuits and layouts are shown in figures 8 (LP package) and 9 (ET package).The printed circuit board should use a heavy groundplane. For optimum electrical and thermal performance, the A4982 must be soldered directly onto the ...

Page 13

A4982 OUT2B OUT2A OUT1A GND ROSC GND Figure 9. ET package typical application and circuit layout VDD VBB 8 V GND GND V BB VREG SENSE 10 V GND DMOS Microstepping Driver with ...

Page 14

A4982 STEP 100.00 70.71 Phase 1 I OUT1A 0.00 Direction = H (%) –70.71 –100.00 100.00 70.71 Phase 2 I OUT2A 0.00 Direction = H (%) –70.71 –100.00 Figure 10. Decay Mode for Full-Step Increments STEP Phase 1 I OUT1A ...

Page 15

A4982 STEP 100 Phase OUT1A Direction = H 0 (%) –10 –20 –29 –38 –47 –56 –63 –71 –77 –83 –88 –96 –100 100 96 88 ...

Page 16

A4982 Table 2. Step Sequencing Settings Home microstep position at Step Angle 45º; DIR = H Full Half 1/4 1/16 Phase 2 Step Step Step Step Current (#) (#) (#) (#) (% I TRIP(max 18.75 ...

Page 17

A4982 ET Package OUT2B VBB2 ENABLE 5 GND 6 CP1 7 CP2 8 Terminal List Table Name CP1 CP2 DIR ¯ E ¯ ¯ N ¯ ¯ A ¯ ¯ B ¯ ¯ L ...

Page 18

A4982 ET Package, 32-Contact QFN with Exposed Thermal Pad 33X 0.08 C 0.25±0.10 0.50±0. DMOS Microstepping Driver with Translator 5.00 ±0. 5.00 ±0.15 C SEATING PLANE 0.90 ±0.10 C ...

Page 19

A4982 LP Package, 24-Pin TSSOP with Exposed Thermal Pad 7.80 ±0. 4.32 24X 0.10 C +0.05 0.25 0.65 –0.06 DMOS Microstepping Driver with Translator And Overcurrent Protection 4° ±4 0.15 3.00 4.40 ±0.10 6.40 ±0.20 ...

Page 20

A4982 Revision History Revision Rev. 1 Copyright ©2008-2011, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to ...

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