A3935KLQTR-T Allegro Microsystems Inc, A3935KLQTR-T Datasheet - Page 8

IC CTLR MOSFET 3PH AUTO 36-SOIC

A3935KLQTR-T

Manufacturer Part Number
A3935KLQTR-T
Description
IC CTLR MOSFET 3PH AUTO 36-SOIC
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A3935KLQTR-T

Applications
DC Motor Driver, Brushless (BLDC), 3 Phase
Number Of Outputs
1
Voltage - Load
7 V ~ 40 V
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 135°C
Mounting Type
Surface Mount
Package / Case
36-QSOP
Device Type
Full Bridge
Peak Output Current
1.6mA
Output Resistance
8ohm
Input Delay
150ns
Output Delay
150ns
Supply Voltage Range
4.75V To 5.25V
Driver Case Style
QSOP
No. Of Pins
36
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
620-1292-2
A3935KLQTR-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3935KLQTR-T
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
A3935
AHI, BHI, and CHI. Direct control of high-side gate outputs
GHA, GHB, and GHC. Logic 1 drives the gate on. Logic 0 pulls
the gate down, turning off the external power MOSFET. Inter-
nally pulled down when the terminal is open.
ALO, BLO, and CLO. Direct control of low-side gate outputs
GHA, GHB, and GHC. Logic 1 drives the gate on. Logic 0 pulls
the gate down, turning off the external power MOSFET. Inter-
nally pulled down when the terminal is open.
BOOSTD. Boost converter switch drain connection.
BOOSTS. Boost converter switch source connection.
CA, CB, and CC. High-side connection for the bootstrap
capacitors, CBOOTx, positive supply for high-side gate drive.
The bootstrap capacitor is charged to V
terminal is low. When the output swings high, the voltage on this
terminal rises with the output to provide the boosted gate voltage
needed for N-channel power MOSFETs.
CSN. Input for current-sense differential amplifier, on the
inverting, negative side. Kelvin connection for the ground side of
the current-sense resistor, RSENSE.
CSOUT. Amplifier output voltage proportional to the current
sensed across an external low-value resistor placed in the ground
side of the power MOSFET bridge.
CSP. Input for current-sense differential amplifier, on the non-
inverting, positive side. Connected to the positive side of the
sense resistor, RSENSE.
ENABLE. Logic 0 disables the gate control signals and switches
off all the gate drivers (low) causing a coast condition. Can be
used in conjunction with the gate inputs to PWM (pulse wave
modulate) the load current. Internally pulled down when the
terminal is open.
¯ F ¯ ¯ A ¯ ¯ U ¯ ¯ L ¯ ¯ T ¯
that one or more fault conditions have occurred.
GHA, GHB, and GHC. High-side gate drive outputs for
N-channel MOSFET drivers. External series gate resistors can
control the slew rate seen at the power driver gate, thereby
controlling the di/dt and dv/dt of Sx outputs.
GLA, GLB, and GLC. Low-side gate drive outputs for external,
N-channel MOSFET drivers. External series gate resistors can
control slew rate.
GND. Ground, or negative, side of VDD and VBAT supplies.
. Diagnostic logic output signal. When low, indicates
3-Phase Power MOSFET Controller for Automotive Applications
REG
when the output Sx
Terminal Descriptions
LSS. Low-side gate driver return. Connects to the common
sources on the low sides of the power MOSFET bridge.
OVFLT. Logic 1 indicates that the V
VBAT overvoltage trip point set by the OVSET level. It will
recover after exceeding a hysteresis below that maximum value.
Normally, it has a high-impedance state. If OVFLT and UVFLT
are both in high-impedance state; then, at least, a thermal
shutdown or VDD undervoltage has occurred.
OVSET. A positive dc level that controls the VBAT overvoltage
trip point. Usually, set by a precision resistor divider network
between VDD and GND, but can be held grounded for a preset
value. When this terminal is open, it sets an unspecified but high
overvoltage trip point.
SA, SB, and SC. Directly connected to the motor terminals,
these terminals sense the voltages switched across the load and
are connected to the negative side of the bootstrap capacitors,
CBOOTx. Also, are the negative supply connection for the
floating high-side drivers.
UVFLT. Logic 1 indicates that the V
minimum value. It will recover after exceeding a hysteresis above
that minimum value. Has a high-impedance state. If UVFLT and
OVFLT are both in high-impedance state; then, at least, a thermal
shutdown or VDD undervoltage has occurred.
VBAT. Battery voltage. Positive input. usually connected to the
motor voltage supply.
VBOOST. Boost converter output, 16 V nominal, is also the
input to the regulator for VREG. Has internal boost-current
and boost-voltage control loops. In high-voltage systems is
approximately one diode drop below V
VDD. Logic supply, +5 V nominal.
VDRAIN. Kelvin connection for drain-to-source voltage monitor.
Connected to the high-side drains of the MOSFET bridge. High
impedance when this terminal is open, and registers as a short-to-
ground fault on all motor phases.
VDSTH. A positive dc level that sets the drain-to-source monitor
threshold voltage. Internally pulled down when this terminal is
open.
VREG. High-side gate driver supply, 13.5 V nominal. Has low-
voltage dropout (LDO) feature.
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
BAT
BAT
BAT
level is below its
level exceeded the
.
8

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