MC34920EI Freescale Semiconductor, MC34920EI Datasheet - Page 11

• Manufacturer Part Number: MC34920EI
• Description: IC MOTOR DRIVER QUAD H 44-PLCC
• Manufacturer: Freescale Semiconductor
• Type: Quad Line Receiverr

Specifications of MC34920EI

• Applications: DC Motor Driver, Stepper Motor Driver, H Bridge
• Number Of Outputs: 2
• Current - Output: 1.5A
• Voltage - Supply: 21 V ~ 42 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Operating Supply Voltage: 10 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Analog Integrated Circuit Device Data
Freescale Semiconductor
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
RESET
nCS
nCS
nCS
SDI
SDI
SDI
VCC
VCC
n RESET
n RESET
SDI
CS
VCC
1.0 V
1 V
1 V
t
DELAY
(plus t
Figure 5.
Tcs + SCLK
Tcs + SCLK
Tcs + SCLK
t
CS-SCLK
Undefined
(plus Tpersist delay)
(plus Tpersist delay)
(plus Tpersist delay)
undefined
undefined
LSB
LSB
LSB
LSB
Tdelay 15-50mS
Tdelay 15-50mS
Tdelay 15-50mS
15–50 ms
Bit 1
PERSIST
Bit 1
Bit 1
Bit 1
Trip Level
V
Trip level
Trip level
VtVCC
VtVCC
V1T
Power On
Power On
Power On
RESET
Power On
)
Bit 2
Bit 2
Bit 2
Bit 2
Generation Timing Diagram (Assumes V
Bit 3
Bit 3
Bit 3
Bit 3
Assumes VB+ > VtVB+ during the entire period
Assumes VB+ > VtVB+ during the entire period
Bit 4
Bit 4
Bit 4
Bit 4
Figure 4. Serial Connectivity Diagram
Tpersist delay
Tpersist delay
Bit 5
Bit 5
Bit 5
Bit 5
t
“Glitch” Response
“Glitch” Response
“Glitch” Response
t
PERSIST
DSU
TIMING DIAGRAMS
Tdsu
Tdsu
Tdsu
Time
Time
Time
Time
“Glitch” Response
Bit 6
Bit 6
Bit 6
Bit 6
Data latched on rising edge of SCLK
Data Latched on the rising edge of SCLK
Data Latched on the rising edge of SCLK
Data Latched on the rising edge of SCLK
Tend
Tend
Tend
t
Bit 7
Bit 7
Bit 7
Bit 7
Short glitch below V
for less than t
DHD
Short glitch below
Short glitch below
VtVCC for less than Tpersist
VtVCC for less than Tpersist
t
DELAY
(plus Tpersist delay_
(plus Tpersist delay_
(plus t
Tdelay 15-50 mS
Tdelay 15-50 mS
Bit 8
Bit 8
Bit 8
Bit 8
VB+
15–50 ms
PERSIST
PERSIST
> V
Bit 9
Bit 9
Bit 9
Bit 9
VB+T+
V1T
)
Bit 10
Bit 10
Bit 10
Bit 10
During Entire Period)
ELECTRICAL CHARACTERISTICS
Power Off
Power Off
Power Off
Bit 11
Bit 11
Bit 11
Bit 11
Power Off
t
PERSIST
*SDI stays at last value
Bit 12
Bit 12
Bit 12
Bit 12
Tpersist delay
Tpersist delay
TIMING DIAGRAMS
Tcs - SCLK
Tcs - SCLK
Tcs - SCLK
Bit 13
Bit 13
Bit 13
Bit 13*
t
SCLK-CS
MSB
SDI Stays at Last Value
SDI Stays at Last Value
SDI Stays at Last Value
MSB
MSB
MSB
undefined
undefined
undefined
Undefined
Trip level
Trip level
VtVCC
VtVCC
Trip Level
V
V1T
34920
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