NCP1652DWR2G ON Semiconductor, NCP1652DWR2G Datasheet - Page 21

IC PFC CONTROLLER CCM/DCM 20SOIC

NCP1652DWR2G

Manufacturer Part Number
NCP1652DWR2G
Description
IC PFC CONTROLLER CCM/DCM 20SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1652DWR2G

Mode
Continuous Conduction (CCM), Discontinuous Conduction (DCM)
Frequency - Switching
100kHz
Current - Startup
5.62mA
Voltage - Supply
9.3 V ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Switching Frequency
20 KHz to 250 KHz
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCP1652DWR2GOSTR
with adjustable non overlap delay for controlling a
synchronous rectifier switch in the secondary side, an active
clamp switch in the primary or both. In addition, the
controller features a proprietary Soft−Skip™ to reduce
acoustic noise at light loads. Other features found in the
NCP1652 include a high voltage startup circuit, voltage
feedforward, brown out detector, internal overload timer,
latch input and a high accuracy multiplier.
NCP1652 PFC Loop
current mode control used for achieving the unity power
factor. The PFC section includes a variable reference
generator, a low frequency voltage regulation error
amplifier (AC error AMP), ramp compensation (Ramp
Comp) and current shaping network. These blocks are
shown in the lower portion of the bock diagram (Figure 51).
signal (FB), scaled AC input signal (AC_IN) and
feedforward input (V
generator is a rectified version of the input sine−wave scaled
by the FB and V
proportional to the FB and inversely proportional to the
square of the V
input voltage, the signal would be higher.
current output of the current sense amplifier to match the
reference generator output. The output of the AC error
amplifier is compensated to prevent response to fast events.
This output (V
a reference buffer. The PWM comparator sums the V
the instantaneous current and compares it to a 4.0 V
threshold to provide the desired duty cycle control. Ramp
The NCP1652 incorporates a secondary driver, OUTB,
The NCP1652 incorporates a modified version of average
The inputs to the reference generator include feedback
The function of the AC error amp is to force the average
Figure 57. NCP1652 and NCP4302 based single stage PFC with synchronous rectification.
error
FF
V
IN
. This, for higher load levels and/or lower
) is fed into the PWM comparator through
FF
values. The reference amplitude is
FF
). The output of the reference
NCP1652
OUTB
OUTA
error
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and
21
compensation is also added to the input signal to allow CCM
operation above 50% duty cycle.
High Voltage Startup Circuit
eliminates the need for external startup components and
provides a faster startup time compared to an external
startup resistor. The startup circuit consists of a constant
current source that supplies current from the HV pin to the
supply capacitor on the V
(I
current source is disabled once the V
V
the V
its minimum operating threshold (V
Upon reaching V
V
V
Otherwise, the system will not start.
overload or V
drivers, sets the controller in a low current mode and allows
V
minimize power dissipation in external components during
a fault event. Figure 58 shows double hiccup mode
operation. A soft−start sequence is initiated the second time
V
reaching V
During this mode, V
controller logic reset level. This prevents latched faults to be
cleared unless power to the controller is completely
removed (i.e. unplugging the supply from the AC line).
start
CC(on)
CC
CC(off)
CC
CC
The NCP1652 internal high voltage startup circuit
The OUTA and OUTB drivers are enabled and the startup
The controller operates in double hiccup mode while in
to discharge to V
) is typically 5.5 mA.
CC
capacitor should be sized such V
reaches V
, typically 15.3 V. The controller is then biased by
capacitor. The drivers are disabled if V
while the auxiliary voltage is building up.
TRIG
CC(on)
NCP4303
CC(off)
CC(on)
DRV
CC(off)
, the controller stays in hiccup mode.
. A double hiccup fault disables the
CC
CC(off)
. If the controller is latched upon
the gate drivers are disabled. The
never drops below V
CC
. This cycle is repeated twice to
pin (C
CC
CC(off)
V
). The startup current
OUT
CC
CC
) typically 10.3 V.
voltage reaches
is kept above
CC
CC(reset)
decays to
, the

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