MC15XS3400CPNAR2 Freescale Semiconductor, MC15XS3400CPNAR2 Datasheet - Page 29

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MC15XS3400CPNAR2

Manufacturer Part Number
MC15XS3400CPNAR2
Description
IC SWITCH HIGH SIDE QUAD 24-QFN
Manufacturer
Freescale Semiconductor
Type
High Side Switchr
Datasheet

Specifications of MC15XS3400CPNAR2

Number Of Outputs
4
Rds (on)
15 mOhm
Internal Switch(s)
Yes
Current Limit
5A
Voltage - Input
6 ~ 20 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
24-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FAIL-SAFE MODE
Watchdog
detection is active when either the WAKE or IN_ON[0:3] or
RST
input is capable of being pulled up to VPWR with a series of
limiting resistance limiting the internal clamp current
according to the specification.
As long as the WD bit (D15) of an incoming SPI message is
toggled within the minimum watchdog timeout period
(WDTO), the device will operate normally.
Fail-safe Conditions
for FSI open
(V
device will revert to a Fail-safe mode until the WD bit is written
to logic [1] (see fail-safe to normal mode transition paragraph)
and V
Analog Integrated Circuit Device Data
Freescale Semiconductor
DD
The 15XS3400 is in Fail-safe mode when:
• V
• wake-up = 1,
• fail = 1,
• fault = 0.
If the FSI input is not grounded, the watchdog timeout
The watchdog timeout is a multiple of an internal oscillator.
If an internal watchdog timeout occurs before the WD bit
input pin transitions from logic [0] to logic [1]. The WAKE
< V
DD
PWR
DD(FAIL)
is within the normal voltage range.
is within the normal voltage range,
(Table
)) for VDD_FAIL_en bit is set to logic [1], the
9) or in case of V
DD
failure condition
corresponding input. The SPI register content is reset to their
default value (except POR bit) and fault protections are fully
operational.
bit is set to [0].
NORMAL & FAIL-SAFE MODE TRANSITIONS
voltage and the microcontroller has to send a SPI command
with WDIN bit set to logic [1] ; the other bits are not
considered. The previous latched faults are reset by the
transition into Normal mode (autoretry included).
mode due to watchdog timeout issue by forcing the FSI pin to
logic [0].
occurred (fail=1). The previous latched faults are reset by the
transition into Fail-safe mode (autoretry included).
Transition Fail-Safe to Normal mode
Transition Normal to Fail-safe Mode
Table 9. SPI Watchdog Activation
0 (shorted to ground)
During the Fail-safe mode, the outputs will depend on the
The Fail-safe mode can be detected by monitoring the NM
To leave the Fail-safe mode, V
Moreover, the device can be brought out of the Fail-safe
To leave the Normal mode, a fail-safe condition must
Typical RFSI (Ω)
(open)
FUNCTIONAL DEVICE OPERATION
DD
Watchdog
Disabled
must be in nominal
Enable
OPERATIONAL MODES
15XS3400
29

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