A8439EEJTR-T Allegro Microsystems Inc, A8439EEJTR-T Datasheet - Page 14

• Manufacturer Part Number: A8439EEJTR-T
• Description: IC CHARGER PHOTO FLASH 10MLP
• Manufacturer: Allegro Microsystems Inc

Specifications of A8439EEJTR-T

• Applications: Photoflash Capacitor Charger
• Current - Supply: 1.5mA
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-WFDFN Exposed Pad
• Input Voltage: 5.5V
• No. Of Outputs: 1
• Supply Voltage Range: 3V To 5.5V
• No. Of Pins: 10
• Operating Temperature Range: -40°C To +85°C
• Termination Type: SMD
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 620-1203-2; A8439EEJTR-T

A8439
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
Copyright ©2005-2009, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
11X
0.08
D
0.40 ±0.10
C
0.25
+0.05
–0.07
Photoflash Capacitor Charger with IGBT Driver and Refresh
10
10
1
1
A
2
2
3.00 ±0.15
0.50
2.38
For the latest version of this document, visit our website:
B
Package EJ, 10-Contact TDFN/MLP
3.00 ±0.15
1.65
0.75 ±0.05
SEATING
PLANE
www.allegromicro.com
C
A Terminal #1 mark area
B Exposed thermal pad (reference only, terminal #1
C Reference land pattern layout (reference
0.85
For Reference Only
(reference JEDEC MO-229WEED)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
identifier appearance at supplier discretion)
IPC7351 SON50P300X300X80-11WEED3M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
C
PCB Layout Reference View
10
1
0.30
2.38
0.50
1.65
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
3.10
14