MAX17075ETG+ Maxim Integrated Products, MAX17075ETG+ Datasheet - Page 19

• Manufacturer Part Number: MAX17075ETG+
• Description: IC DC-DC CONV W/CHRG PUMP 24TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17075ETG+

• Applications: LCD TV/Monitor
• Current - Supply: 4mA
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The inductor’s saturation current rating and the
MAX17075’s LX current limit should exceed I
and the inductor’s DC current rating should exceed
I
less than 0.1Ω series resistance.
Considering the typical operating circuit, the maximum
load current (I
and a typical input voltage of 5V. Choosing an LIR of 0.5
and estimating efficiency of 85% at this operating point:
Using the circuit’s minimum input voltage (2.5V) and
estimating efficiency of 80% at that operating point:
The ripple current and the peak current are:
The total output voltage ripple has two components: the
capacitive ripple caused by the charging and discharg-
ing of the output capacitance, and the ohmic ripple due
to the capacitor’s equivalent series resistance (ESR):
and
where I
Inductor Selection section). For ceramic capacitors, the
output voltage ripple is typically dominated by
V
characteristics of the output capacitor must also be
considered.
IN(DC,MAX)
V
AVDD
Boost Regulator with Integrated Charge Pumps,
AVDD RIPPLE
L
AVDD
_
V
_
RIPPLE(C)
AVDD RIPPLE C
PEAK
I
RIPPLE
V
=
AVDD RIPPLE ESR
. For good efficiency, choose an inductor with
I
⎛
⎝ ⎜
IN DC MAX
I
13
PEAK
_
5
(
AVDD(MAX)
is the peak inductor current (see the
V
V
_
=
=
,
⎞
⎠ ⎟
. The voltage rating and temperature
Switch Control, and High-Current Op Amp
V
3 3
______________________________________________________________________________________
2
=
2 5
AVDD RIPPLE C
.
⎛
⎝ ⎜
.
3 25
( )
µH
0 5
)
.
V
.
=
(
13
×
×
A
≈
_
0 5
A
2 5
) is 500mA with a 13V output
13
(
.
V
×
C
.
13
+
Output Capacitor Selection
I
)
AVDD
1 2
A
AVDD
−
V
V
≈
0 51
V
.
5
×
.
I
×
×
PEAK ESR AVDD
MHz
−
2
V
13
1 2
0 8
( )
2 5
.
A
.
⎛ ⎛
⎝ ⎜
.
V
MHz
≈
V
R
+
⎞
⎠ ⎟
V
≈
V
AVDD
⎛
⎝ ⎜
3 51
V
)
AVDD SW
3 25
0
.
AVDD RIPPLE E
0 5
.
.8 8 5
≈
.
_
A
0 5
−
A
f
⎞
⎠ ⎟
. 1 1 A
_
V
AVDD
≈
IN
3 35
⎞
⎠ ⎟
.
,
_
μH
PEAK
(
S S R)
,
The input capacitor (C
drawn from the input supply and reduces noise injec-
tion into the IC. Two 10µF ceramic capacitors are used
in the typical operating circuit (Figure 1) because of the
high source impedance seen in typical lab setups.
Actual applications usually have much lower source
impedance since the step-up regulator often runs
directly from the output of another regulated supply.
Typically, C
the typical operating circuit. Ensure a low-noise supply
at V
age variation can be tolerated on C
pled from C
C5 in Figure 1).
The MAX17075’s high switching frequency demands a
high-speed rectifier. Schottky diodes are recommend-
ed for most applications because of their fast recovery
time and low forward voltage. In general, a 2A Schottky
diode complements the internal MOSFET well.
The output voltage of the step-up regulator can be
adjusted by connecting a resistive voltage-divider from
the output (V
nected to FB (see Figure 1). Select R9 in the 10kΩ to
50kΩ range. Calculate R8 with the following equation:
where V
is 1.25V. Place R8 and R9 close to the IC.
Choose R
quency integrator gain for fast-transient response.
Choose C
zero to maintain loop stability.
For low-ESR output capacitors, use the following equa-
tions to obtain stable performance and good transient
response:
CC
by using adequate C
FB
R
COMP
COMP
COMP
, the step-up regulator’s feedback set point,
IN
C
IN
AVDD
COMP
can be reduced below the values used in
using an RC lowpass filter (see R1 and
≈
R
(C12 in Figure 1) to set the integrator
(R10 in Figure 1) to set the high-fre-
8
312 5 .
) to ground with the center tap con-
≈
=
10
R
L
9
IN
AVDD
×
×
×
V
V
I
) reduces the current peaks
AVDD
AVDD MAX COMP
⎛
⎝ ⎜
IN
V
Input-Capacitor Selection
IN
Output Voltage Selection
AVDD
V
×
×
. Alternately, greater volt-
FB
V
I
(
AVDD MAX
×
AVDD
C
Loop Compensation
−
AVDD
)
IN
1
R
(
⎞
⎠ ⎟
×
if VCC is decou-
Rectifier Diode
C
AVDD
)
19