MAX17000AETG+ Maxim Integrated Products, MAX17000AETG+ Datasheet - Page 28

IC PWM CTLR DDR/DDR2/DDR3 24TQFN

MAX17000AETG+

Manufacturer Part Number
MAX17000AETG+
Description
IC PWM CTLR DDR/DDR2/DDR3 24TQFN
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX17000AETG+

Applications
Memory, DDR2/DDR3 Regulator
Current - Supply
2mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Complete DDR2 and DDR3 Memory
Power-Management Solution
where I
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good size heatsink to handle the overload
power dissipation.
Choose a Schottky diode (DL) with a forward voltage
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. Select a
diode that can handle the load current during the dead
times. This diode is optional and can be removed if effi-
ciency is not critical.
The MAX17000’s Dual Mode™ operation allows the
selection of common voltages without requiring external
components. Connect FB to AGND for a fixed 1.5V out-
put, to V
directly to OUT for a fixed 1.0V output.
The output voltage can be adjusted from 1.0V to 2.7V
using a resistive voltage-divider (Figure 8). The
MAX17000 regulates FB to a fixed reference voltage
(1.0V). The adjusted output voltage is:
where V
Figure 8. Setting V OUT with a Resistive Voltage-Divider
Dual Mode is a trademark of Maxim Integrated Products, Inc.
28
______________________________________________________________________________________
FB
VALLEY(MAX)
CC
MAX17000
is 1.0V.
for a fixed 1.8V output, or connect FB
Setting the PWM Output Voltage
V
OUT
PGND1
=
CSH
is the maximum valley current
CSL
DL
V
LX
FB
FB
Adjustable Output Voltage
×
⎝ ⎜
1
Preset Output Voltages
+
R
R
FBA
FBB
N
⎠ ⎟
L
D1
The value of the VTTI bypass capacitor is chosen to
limit the amount of ripple/noise at VTTI, and the amount
of voltage dip during a load transient. Typically, VTTI is
connected to the output of the buck regulator, which
already has a large bulk capacitor. Nevertheless, a
ceramic capacitor of equivalent value to the VTT output
capacitor must be used and must be added and
placed as close as possible to the VTTI pin. This value
must be increased with larger load current, or if the
trace from the VTTI pin to the power source is long and
has significant impedance.
The VTT output stage is powered from the VTTI input.
The output voltage is set by the REFIN input. REFIN sets
the feedback regulation voltage (VTTR = VTTS =
V
age input to set the adjustable output for VTT, VTTS, and
VTTR. If REFIN is tied to V
is used to set VTT voltage; hence, VTT tracks the V
voltage and is set to V
MAX17000 ideal for memory applications in which the
termination supply must track the supply voltage.
A minimum value of 9µF is needed to stabilize a 300mA
VTT output. This value of capacitance limits the regula-
tor’s unity-gain bandwidth frequency to approximately
1.2MHz (typ) to allow adequate phase margin for stabil-
ity. To keep the capacitor acting as a capacitor within
the regulator’s bandwidth, it is important that ceramic
capacitors with low ESR and ESL be used.
REFIN
) of the MAX17000. Connect a 0.1V to 2.0V volt-
L1
VTT Output Capacitor Selection
Setting VTT Output Voltage
CSL
Stability Considerations
CC
/2. This feature makes the
R
R
VTTI Input Capacitor
, the internal CSL/2 divider
FBA
FBB
C
V
OUT
OUT
CSL

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