MAX8660ETL+T Maxim Integrated Products, MAX8660ETL+T Datasheet - Page 21

• Manufacturer Part Number: MAX8660ETL+T
• Description: IC POWER MANAGE XSCALE 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8660ETL+T

• Applications: Processor
• Voltage - Supply: 2.6 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MAX8660 MAX8661
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PIN
Voltage Management for Mobile Applications
High-Efficiency, Low-I
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NAME
SRAD
SET1
GND
GND
GND
GND
EN2
PG1
N.C.
EN1
PV1
LX1
PV
V1
V4
EP
REG2 Enable Input. Drive EN2 high to turn on REG2. EN2 has hysteresis so that an RC can be
used to implement manual sequencing with respect to other inputs. EN2 is typically driven by the
SYS_EN output of an Marvell PXA3xx processor.
Serial-Address Input. Connect SRAD to AGND for a 7-bit slave address of 0110 100 (0x68).
Connect SRAD to IN to change the address to 0110 101 (0x6A). The eighth slave address bit is
always zero since the MAX8660/MAX8661 are write-only. See the Slave Address section for more
information.
RE G 1 P ow er G r ound . C onnect P G 1, P G 2, P G 3, P G 4, and AG N D tog ether . Refer to the M AX 8660 E V
ki t data sheet for more information.
Ground. Connect all GND pins to EP.
REG1 Switching Node. Connect LX1 to the REG1 inductor. LX1 is high impedance when REG1 is
shutdown.
No Internal Connection
REG1 Power Input. Connect a 4.7µF ceramic capacitor from PV1 to PG1. All PV pins and IN must
be connected together externally.
Power Input. All PV pins and IN must be connected together externally.
REG1 Enable Input. Drive EN1 high to turn on REG1. EN1 has hysteresis so that an RC can be
used to implement manual sequencing with respect to other inputs. EN1 is typically driven by the
SYS_EN output of an applications processor.
Ground. Connect all GND pins to EP.
REG1 Voltage Sense Input. Connect V1 directly to the REG1 output voltage. The output voltage of
REG1 is selected by SET1. Connect V1 to VCC_IOx of the applications processor. V1 is internally
pulled to AGND through 650Ω when REG1 is shut down.
Ground. Connect all GND pins to EP.
REG1 Voltage Select Input. SET1 is a tri-level logic input. Connect SET1 to select the V1 output
voltage as detailed in Table 3. The REG1 output voltage selected by SET1 is latched at the end of
the REG1 soft-start period. Changes to SET1 after the startup period have no effect.
Ground. Connect all GND pins to EP.
REG4 Feedback Sense Input. Connect V4 directly to the REG4 output voltage. The REG4 output
voltage is adjustable from 0.725V to 1.8V with the serial interface. V4 is internally pulled to AGND
through 550Ω when REG4 is shut down. V4 powers VCC_SRAM on the applications processor.
Exposed Pad. Connect the exposed pad to ground. Connecting the exposed pad to ground does
not remove the requirement for proper ground connections to PG1, PG2, PG3, PG4, and AGND.
The exposed pad is attached with epoxy to the substrate of the die, making it an excellent path to
remove heat from the IC.
Q
, PMICs with Dynamic
FUNCTION
Pin Description (continued)
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