MAX8588ETM+T Maxim Integrated Products, MAX8588ETM+T Datasheet

IC PMIC HI EFF LOW IQ 48-TQFN

MAX8588ETM+T

Manufacturer Part Number
MAX8588ETM+T
Description
IC PMIC HI EFF LOW IQ 48-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8588ETM+T

Applications
Processor
Voltage - Supply
2.6 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The MAX8588 power-management IC is optimized for
devices using Intel X-Scale™ microprocessors, includ-
ing smartphones, PDAs, internet appliances, and other
portable devices requiring substantial computing and
multimedia capability at low power.
The IC integrates seven high-performance, low-operating-
current power supplies along with supervisory and
management functions. Included are three step-down
DC-DC outputs, three linear regulators, and a seventh
always-on output. DC-DC converters power I/O, memo-
ry, and the CPU core. The I/O supply can be preset to
3.3V or adjusted to other values. The DRAM supply is
preset for 3.3V or 2.5V, or it can be adjusted with exter-
nal resistors. The CPU core supply is serial pro-
grammed for dynamic voltage management and can
supply up to 0.5A. Linear-regulated outputs are provid-
ed for SRAM, PLL, and USIM supplies.
To minimize quiescent current, critical power supplies
have bypass “sleep” LDOs that can be activated when
output current is very low. Other functions include sep-
arate on/off control for all DC-DC converters, low-bat-
tery and dead-battery detection, a reset and power-OK
output, a backup-battery input, and a two-wire serial
interface.
All DC-DC outputs use fast, 1MHz PWM switching and
small external components. They operate with fixed-fre-
quency PWM control and automatically switch from
PWM to skip-mode operation at light loads to reduce
operating current and extend battery life. The core out-
put can be forced into PWM mode at all loads to mini-
mize noise. A 2.6V to 5.5V input voltage range allows
1-cell lithium-ion (Li+), 3-cell NiMH, or a regulated 5V
input. The MAX8588 is available in a tiny 6mm x 6mm,
48-pin thin QFN package.
19-3527; Rev 0; 3/05
X-Scale is a trademark of Intel Corp.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PDA, Palmtop, and Wireless Handhelds
Third-Generation Smart Cell Phones
Internet Appliances and Web-Books
Dynamic Core for PDAs and Smartphones
________________________________________________________________ Maxim Integrated Products
General Description
High-Efficiency, Low-I
Applications
♦ Six Regulators in One Package
♦ Low Operating Current
♦ Optimized for X-Scale Processors
♦ Backup-Battery Input
♦ 1MHz PWM Switching Allows Small External
♦ Tiny 6mm x 6mm, 48-Pin Thin QFN Package
Pin Configuration appears at end of data sheet.
MAX8588ETM
Components
Step-Down DC-DC for I/O at 1.3A
Step-Down DC-DC for Memory at 0.9A
Step-Down Serial-Programmed DC-DC for CORE
Up to 0.5A
Three LDO Outputs for SRAM, PLL, and USIM
Always-On Output for VCC_BATT
60µA in Sleep Mode (Sleep LDOs On)
130µA with DC-DCs On (Core Off)
200µA All Regulators On, No Load
5µA Shutdown Current
PART
nBATT_FAULT
nVCC_FAULT
PWR_EN
MAIN BATTERY
SYS_EN
nRESET
BACKUP
BATTERY
-40°C to +85°C 48 Thin QFN (6mm x 6mm)
TEMP RANGE
IN
BKBT
MR
RSO
POK
DBO
ON1-2
ON3-6
Ordering Information
MAX8588
Simplified Diagram
Q
PMIC with
V1
V2
V3
V4
V5
V6
V7
PIN-PACKAGE
VCC_IO 3.3V
VCC_MEM 2.5V
VCC_CORE
0.8V TO 1.3V
VCC_PLL 1.3V
VCC_SRAM 1.1V
VCC_USIM
0V, 1.8V, 3.0V
VCC_BATT
Features
1

Related parts for MAX8588ETM+T

MAX8588ETM+T Summary of contents

Page 1

... PDA, Palmtop, and Wireless Handhelds Third-Generation Smart Cell Phones Internet Appliances and Web-Books X-Scale is a trademark of Intel Corp. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. High-Efficiency, Low-I ♦ Six Regulators in One Package Step-Down DC-DC for I ...

Page 2

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones ABSOLUTE MAXIMUM RATINGS IN, IN45, IN6, MR, LBO, DBO, RSO, POK, SCL, SDA, BKBT, V7, SLP, SRAD, PWM3 to GND...............-0.3V to +6V REF, CC_, ON_, FB_, DBI, LBI, V1, V2, RAMP, BYP, ...

Page 3

Dynamic Core for PDAs and Smartphones ELECTRICAL CHARACTERISTICS (continued 3.6V 3.0V 1.1V BKBT LBI are +25°C.) A PARAMETER p-Channel On-Resistance n-Channel On-Resistance Current-Sense Transresistance p-Channel Current-Limit Threshold PWM Skip-Mode ...

Page 4

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones ELECTRICAL CHARACTERISTICS (continued 3.6V 3.0V 1.1V BKBT LBI are +25°C.) A PARAMETER I p-Channel On-Resistance I I n-Channel On-Resistance I Current-Sense ...

Page 5

Dynamic Core for PDAs and Smartphones ELECTRICAL CHARACTERISTICS (continued 3.6V 3.0V 1.1V BKBT LBI are +25°C.) A PARAMETER LBI Threshold (Falling) DBI Threshold (Falling) RSO Threshold (Falling) RSO Deassert ...

Page 6

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones ELECTRICAL CHARACTERISTICS (V = 3.6V 3.0V 1.1V BKBT LBI PARAMETER PV1, PV2, PV3, SLPIN, IN Supply Voltage Range IN45, IN6 Supply Voltage Range IN Undervoltage-Lockout (UVLO) ...

Page 7

Dynamic Core for PDAs and Smartphones ELECTRICAL CHARACTERISTICS (continued 3.6V 3.0V 1.1V BKBT LBI PARAMETER SYNCHRONOUS-BUCK PWM REG3 REG3 Output Voltage Accuracy p-Channel On-Resistance n-Channel On-Resistance p-Channel Current-Limit Threshold OUT3 Maximum Output ...

Page 8

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones ELECTRICAL CHARACTERISTICS (continued 3.6V 3.0V 1.1V BKBT LBI PARAMETER DBI Threshold (Falling) Hysteresis is 5% (typ) RSO Threshold (Falling) Voltage on REG7, hysteresis is ...

Page 9

Dynamic Core for PDAs and Smartphones ELECTRICAL CHARACTERISTICS (continued) Note 1: Dropout voltage is guaranteed by the p-channel switch resistance and assumes a maximum inductor resistance of 45mΩ. Note 2: The PWM-skip-mode transition has approximately 10mA of hysteresis. Note 3: ...

Page 10

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones (Circuit of Figure 3.6V +25°C, unless otherwise noted REG1 3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT 100 4.0V IN ...

Page 11

Dynamic Core for PDAs and Smartphones (Circuit of Figure 3.6V +25°C, unless otherwise noted DROPOUT VOLTAGE vs. LOAD CURRENT 300 250 200 150 100 REG1 3.3V OUTPUT 200 400 600 ...

Page 12

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones (Circuit of Figure 3.6V +25°C, unless otherwise noted REG3 SWITCHING WAVEFORMS WITH 250mA LOAD V3 V LX3 I L3 400ns/div REG3 FORCED-PWM SWITCHING WAVEFORMS WITH ...

Page 13

Dynamic Core for PDAs and Smartphones (Circuit of Figure 3.6V +25°C, unless otherwise noted REG1 LOAD-TRANSIENT RESPONSE 200µs/div REG3 LOAD-TRANSIENT RESPONSE 200µs/div ______________________________________________________________________________________ High-Efficiency, Low-I Typical Operating Characteristics (continued) MAX8588 toc20 V1 100mV/div ...

Page 14

... PWM3 or connect high for forced-PWM operation at all loads for V3 only. LBO 15 Low-Battery Output. Open-drain output that goes low when IN is below the threshold set by LBI. Dual Mode is a trademark of Maxim Integrated Products, Inc. 14 ______________________________________________________________________________________ PMIC with Q FUNCTION when ON1 is low out of regulation. ...

Page 15

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones PIN NAME REG2 Power Input. Bypass to PG2 with a 4.7µF or greater low-ESR capacitor. PV1, PV2, PV3, and IN must 16 PV2 connect together externally. 17 LX2 REG2 Switching Node. Connects ...

Page 16

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones PIN NAME Serial Address Bit. SRAD allows the serial address to be changed in case it conflicts with another serial 35 SRAD device. If SRAD = GND SRAD ...

Page 17

Dynamic Core for PDAs and Smartphones BATT MAIN BATT DBI (3.15V OR ADJ) LBI (3.6V OR ADJ) REF LBO OPEN-DRAIN LOW-BATT OUT DBO OPEN-DRAIN DEAD-BATT OUT TO nBATT_FAULT ON1 FROM CPU SYS_EN ON2 SLP RUN SLEEP BKBT Li+ BACKUP BATTERY ...

Page 18

... See Figure 1. V1 and V2 (VCC_IO, VCC_MEM) Step-Down DC-DC Converters 1MHz current-mode step-down converter. The V1 output voltage can be preset to 3.3V or adjusted using a resistor voltage-divider. V1 supplies loads up to 1300mA. Idle Mode is a trademark of Maxim Integrated Products, Inc. 18 ______________________________________________________________________________________ PMIC with also a 1MHz current-mode step-down converter. ...

Page 19

Dynamic Core for PDAs and Smartphones V3 (VCC_CORE) Step-Down 1MHz current-mode step-down converter. It sup- plies loads up to 500mA. 2 The V3 output is set by the I C serial interface to between 0.7V and 1.475V ...

Page 20

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones Voltage Monitors, Reset, and Undervoltage-Lockout Functions Undervoltage Lockout When the input voltage is below 2.35V (typ), an under- voltage-lockout (UVLO) circuit disables the IC. The inputs remain high impedance while in UVLO, ...

Page 21

Dynamic Core for PDAs and Smartphones MAIN BATTERY 334kΩ 500kΩ DBI (1.232V THRESHOLD) R5 LBI (1.00V THRESHOLD) 200kΩ R7 200kΩ Figure 4. Setting the Low-Battery and Dead-Battery Thresholds with Separate Resistor-Dividers. The values shown set a DBI ...

Page 22

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones Table 2. V3 and V6 Serial Programming Codes PROG PROG ...

Page 23

Dynamic Core for PDAs and Smartphones LOW HIGH SCL SDA t t SU:STA HD:STA A = START CONDITION B = MSB OF ADDRESS CLOCKED INTO SLAVE C = LSB OF ADDRESS CLOCKED INTO SLAVE D = ...

Page 24

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones A useful approximation is that it takes approximately 2.2 RC time constants for V3 to move from 10% to 90% of the voltage difference. For C RAMP is 330µs. For a 1V ...

Page 25

Dynamic Core for PDAs and Smartphones If the capacitor has significant ESR, the output ripple component due to capacitor ESR is RIPPLE(ESR) L(PEAK) Output capacitor specifics are also discussed in the Compensation and Stability section. Compensation and ...

Page 26

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones BATT MAIN BATT TO BATT TO V1 C19 R19 R20 0.1µF 1MΩ 1MΩ LOW-BATT WARNING TO CPU nBATT_FAULT FROM CPU SYS_EN RUN SLEEP Li+ C25 BACKUP 1µF BATTERY V7, VCC_BATT (ALWAYS ON) ...

Page 27

Dynamic Core for PDAs and Smartphones Note that the pole cancellation does not have to be exact need only be within 0.75 to 1.25 times This provides flexibility in component LOAD ...

Page 28

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones MAIN IN POWER 4.7µF D1 1N4148 BKBT V7 1µF Figure 8. BKBT connection when no backup battery is used alternate backup scheme, not involving the MAX8588, is used. MAIN ...

Page 29

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones Pin Configuration TOP VIEW LB1 1 2 CC1 FB1 3 BKBT MAX8588ETM SLPIN 7 V2 ...

Page 30

High-Efficiency, Low-I Dynamic Core for PDAs and Smartphones (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) D D/2 30 ______________________________________________________________________________________ PMIC with Q E/2 (NE-1) ...

Page 31

... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 31 © 2005 Maxim Integrated Products ...

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