IR3500MPBF International Rectifier, IR3500MPBF Datasheet - Page 32

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IR3500MPBF

Manufacturer Part Number
IR3500MPBF
Description
IC XPHASE3 CONTROL 32-MLPQ
Manufacturer
International Rectifier
Series
XPhase3™r
Datasheet

Specifications of IR3500MPBF

Applications
Processor
Current - Supply
6.5mA
Voltage - Supply
4.75 V ~ 7.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
32-MLPQ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
No Load Output Voltage Setting Resistor R
A resistor between VSETPT pin and VDAC is used to create output voltage offset V
difference between V
I
VCCL Capacitor C
driven. The linear regulator supplies the bias and gate drive current of the phase ICs. A 4.7uF normally ensures
stable VCCL performance for Intel VR11 and AMD applications.
VCCL Programming Resistor R
Since VCCL voltage is proportional to the MOSFET gate driver loss and inversely proportional to the
MOSFET conduction loss, the optimum voltage should be chosen to maximize the converter efficiency. VCCL
linear regulator consists of an external NPN transistor, a ceramic capacitor and a programmable resistor
divider. Pre-select R
VCCL Regulator Drive Resistor R
minimum input voltage requirements. The following equation gives an estimate of the average load current of
the switching phase ICs.
Q
VCCL, the maximum R
Due to limited pull down capability of the VCCLDRV pin, make sure the following condition is satisfied.
In the above equation, V
above condition is not satisfied there is a need to use a device with higher β
be used instead of a single NPN transistor.
Thermistor R
The threshold voltage of VRHOT comparator is fixed at 1.6V, and a negative temperature coefficient (NTC)
thermistor R
thermistor resistance at allowed maximum temperature T
VSETPT
The capacitor is selected based on the stability requirement of the linear regulator and the load current to be
The drive resistor is primarily dependent on the load current requirement of the linear regulator and the
gb
and Q
is the current flowing out of VSETPT pin as shown in Figure 23.
Page 32 of 47
gt
are the gate charge of the top and bottom FET. For a minimum input voltage and a maximum
THERM
THERM
VCCL
is required to sense the temperature of the power stage. If we pre-select R
VCCLFB1
and Over Temperature Setting Resistors R
DAC
VCCLDRV
I
I
( min) and V
voltage and output voltage at no load condition. R
drive
R
, and calculate R
_
R
VCCLDRV
avg
VCCLFB
required to use the full pull-down current of the VCCL driver is given by
V
I
(max)
VCCLFB1
=
[
VCCLDRV
(
2
Q
=
=
V
gb
I
R
( max) is the minimum and maximum anticipated input voltage. If the
0
R
I
VCCLDRV
VCCL
7 .
+
(min)
VCCLFB
and R
Q
R
VCCL
VSETPT
gt
I
VCCLFB2
drive
VSETPT
)
1
*
. 1
0
VCCLFB2
f
_
. 1
7 .
(min)
19
sw
avg
=
19
+
V
VCCL
/
,
10
O
β
from (18).
I
<
VSETPT
_
min
10
mA
NLOFST
MAX
mA
(max)
]
n
is calculated from (22).
HOTSET1
and R
(21)
min
VSETPT
(18)
(20)
(19)
or Darlington configuration can
HOTSET2
is determined by (17), where
O_NLOFST,
(17)
May 18, 2009
THERM
IR3500
which is the
, the NTC

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