MAX6699EE99+ Maxim Integrated Products, MAX6699EE99+ Datasheet - Page 9

IC TEMP MONITOR 5CH 16-QSOP

MAX6699EE99+

Manufacturer Part Number
MAX6699EE99+
Description
IC TEMP MONITOR 5CH 16-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX6699EE99+

Function
Temp Monitoring System (Sensor)
Topology
ADC, Buffer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
I²C™/SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 3 C
Digital Output - Bus Interface
Serial (2-Wire)
Digital Output - Number Of Bits
11 bit
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 3. SMBus Write Timing Diagram
Figure 4. SMBus Read Timing Diagram
diode may or may not cause ALERT or OVERT to assert,
so if a channel will not be used, disconnect its DXP and
DXN inputs.
There are 9 alarm threshold registers that store over-
temperature ALERT and OVERT threshold values.
Seven of these registers are dedicated to store one
local alert temperature threshold limit and six remote
alert temperature threshold limits (see the
Interrupt Mode section). The remaining two registers
are dedicated to remote channels 1 and 4 to store
overtemperature threshold limits (see the OVERT
Overtemperature Alarm section). Access to these regis-
ters is provided through the SMBus interface.
SMBCLK
SMBDATA
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
SMBCLK
SMBDATA
A = START CONDITION
B = MSB OF ADDRESS CLOCKED INTO SLAVE
C = LSB OF ADDRESS CLOCKED INTO SLAVE
D = R/W BIT CLOCKED INTO SLAVE
E = SLAVE PULLS SMBDATA LINE LOW
t
SU:STA
A
t
HD:STA
5-Channel Precision Temperature Monitor
t
SU:STA
_______________________________________________________________________________________
A
t
LOW
t
HD:STA
Alarm Threshold Registers
B
t
HIGH
t
LOW
B
t
HIGH
t
SU:DAT
C
t
SU:DAT
E = SLAVE PULLS SMBDATA LINE LOW
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO SLAVE
H = LSB OF DATA CLOCKED INTO SLAVE
C
F = ACKNOWLEDGE BIT CLOCKED INTO MASTER
G = MSB OF DATA CLOCKED INTO MASTER
H = LSB OF DATA CLOCKED INTO MASTER
I = MASTER PULLS DATA LINE LOW
D
ALERT
D
E
F
E
F
An ALERT interrupt occurs when the internal or external
temperature reading exceeds a high-temperature limit
(user programmable). The ALERT interrupt output signal
can be cleared by reading the status register(s) associ-
ated with the fault(s) or by successfully responding to an
alert response address transmission by the master. In
both cases, the alert is cleared, but is reasserted at the
end of the next conversion if the fault condition still
exists. The interrupt does not halt automatic conversions.
The ALERT output is open drain so that multiple devices
can share a common interrupt line. All ALERT interrupts
can be masked using the configuration 3 register. The
POR state of these registers is shown in Table 3.
t
HD:DAT
G
G
I = MASTER PULLS DATA LINE LOW
J = ACKNOWLEDGE CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION
M = NEW START CONDITION
H
H
J = ACKNOWLEDGE CLOCKED INTO SLAVE
K = ACKNOWLEDGE CLOCK PULSE
L = STOP CONDITION
M = NEW START CONDITION
I
I
ALERT Interrupt Mode
J K
J
K
t
SU:STO
t
SU:STO
L
t
BUF
L
M
t
BUF
M
9

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