W83791G Nuvoton Technology Corporation of America, W83791G Datasheet - Page 65

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W83791G

Manufacturer Part Number
W83791G
Description
IC MONITOR H/W 48-LQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83791G

Function
Hardware Monitor
Topology
ADC
Sensor Type
External
Sensing Temperature
External Sensor
Output Type
I²C™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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7.74 Tolerance of Fan 3 Target Temperature or Speed Register ⎯ Index 97h (Bank
Tolerance of Fan 3 target speed register.
7.75 Fan 3 PWM Stop Duty Cycle Register ⎯ Index 98h (Bank 0)
Power on default: 01h
Tolerance of VTIN3 target temperature register
7
6
5
4
3-0
7
6
5
4
3-0
7-0
BIT
BIT
BIT
0)
Power on default: 00h
FAN3INV
FAN2INV
FAN1INV
Reserved
TOL_FS3[3:0]
STOP_DC3[7:0]
FAN3INV
FAN2INV
FAN1INV
Reserved
TOL_T3[3:0]
NAME
NAME
NAME
RO
RO
RO
Reserved
R/W
RO
RO
RO
Reserved
R/W
R/W
ATTRIBUTE
ATTRIBUTE
ATTRIBUTE
FAN 3 input value if FANINC3 sets to 1. Return ‘1’, the pin
18 status is logic high signal. Read ‘0’, pin18 is logic low
signal.
FAN 2 input value if FANINC2 sets to 1. Return ‘1’, the pin
19 status is logic high signal. Read ‘0’, pin19 is logic low
signal.
FAN 1 input value if FANINC1 sets to 1. Return ‘1’, the pin
20 status is logic high signal. Read ‘0’, pin20 is logic low
signal.
Reserved
Tolerance of Fan 3 Target Temperature. Only for Thermal
Cruise mode.
FAN 3 input value if FANINC3 sets to 1. Return ‘1’, the pin
18 status is logic high signal. Read ‘0’, pin18 is logic low
signal.
FAN 2 input value if FANINC2 sets to 1. Return ‘1’, the pin
19 status is logic high signal. Read ‘0’, pin19 is logic low
signal.
FAN 1 input value if FANINC1 sets to 1. Return ‘1’, the pin
20 status is logic high signal. Read ‘0’, pin20 is logic low
signal.
Reserved
Tolerance of Fan 3 Target Speed Count. Only for Fan
Speed Cruise mode.
In Thermal Cruise mode, PWM duty will be 0 if it decreases
to under this value. This register should be written a non-
zero minimum PWM stop duty cycle.
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: April 14, 2006
W83791D/G
Revision 1.1

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