ADT7518ARQ-REEL Analog Devices Inc, ADT7518ARQ-REEL Datasheet - Page 26

• Manufacturer Part Number: ADT7518ARQ-REEL
• Description: IC SENSOR TEMP W/ADC/DAC 16QSOP
• Manufacturer: Analog Devices Inc

Specifications of ADT7518ARQ-REEL

• Rohs Status: RoHS non-compliant
• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 120°C, External Sensor
• Output Type: I²C™, MICROWIRE™, QSPI™, SPI™
• Output Alarm: No
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 120°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP

ADT7518
If an MSB register is read first, its corresponding LSB register is
not locked, leaving the user with the option of just reading back
8 bits (MSB) of a 10-bit conversion result. Reading an MSB
register first does not lock other MSB registers, and likewise
reading an LSB register first does not lock other LSB registers.
Table 10. ADT7518 Registers
RD/WR
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch–10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h–2Ah
2Bh
2Bh
2Ch
2Dh
2Eh
SECOND READ
COMMAND
Name
Interrupt Status 1
Interrupt Status 2
Reserved
Internal Temp and V
External Temp and AIN1 to AIN4 LSBs
Reserved
V
Internal Temp MSBs
External Temp MSBs/AIN1 MSBs
AIN2 MSBs
AIN3 MSBs
AIN4 MSBs
Reserved
DAC A MSBs
Reserved
DAC B MSBs
Reserved
DAC C MSBs
Reserved
DAC D MSBs
Control Configuration 1
Control Configuration 2
Control Configuration 3
DAC Configuration
LDAC Configuration
Interrupt Mask 1
Interrupt Mask 2
Internal Temp Offset
External Temp Offset
Internal Analog Temp Offset
External Analog Temp Offset
V
V
Internal T
Internal T
External T
External T
Reserved
AIN2 V
AIN2 V
AIN2 V
AIN3 V
AIN3 V
DD
DD
DD
V
V
MSBs
HIGH
LOW
Figure 52. Phase 2 of 10-Bit Read
HIGH
HIGH
LOW
HIGH
LOW
Limit
Limit
HIGH
LOW
UNLOCK ASSOCIATED
HIGH
LOW
Limit
Limit
Limit
Limit
Limit
MSB REGISTERS
Limit
/AIN1 V
Limit
/AIN1 V
REGISTER
MSB
DD
LOW
HIGH
LSBs
Limits
Limits
OUTPUT
DATA
Power-On
Default
00h
00h
00h
00h
00h
xxh
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
D8h
D8h
C7h
62h
64h
C9h
FFh
00h
FFh
FFh
00h
FFh
00h
Rev. A | Page 26 of 40
RD/WR
Address
2Fh
30h
31h–4Ch
4Dh
4Eh
4Fh
50h–7Eh
7Fh
80h–FFh
Interrupt Status 1 Register (Read-Only) [Address = 00h]
This 8-bit read-only register reflects the status of some of the
interrupts that can cause the INT/ INT pin to go active. This
register is reset by a read operation, provided that any out-of-
limit event has been corrected. It is also reset by a software reset.
Table 11. Interrupt Status 1 Register
D7
0*
*
Table 12.
Bit
D0
D1
D2
D3
D4
D5
D6
D7
Interrupt Status 2 Register (Read-Only) [Address = 01h]
This 8-bit read-only register reflects the status of the V
rupt that can cause the INT/ INT pin to go active. This register is
reset by a read operation, provided that any out-of-limit event
has been corrected. It is also reset by a software reset.
Default settings at power-up
Function
1 when the internal temperature value exceeds T
internal temperature reading greater than the set limit will
cause an out-of-limit event.
1 when internal temperature value exceeds T
internal temperature reading less than or equal to the set limit
will cause an out-of-limit event.
This status bit is linked to the configuration of Pins 7 and 8. If
configured for the external temperature sensor, this bit is 1
when the external temperature value the exceeds T
The default value for this limit register is –1°C, so any external
temperature reading greater than the set limit will cause an
out-of-limit event. If configured for AIN1 and AIN2, this bit is 1
when AIN1 input voltage exceeds V
1 when external temperature value exceeds T
default value for this limit register is 0°C, so any external
temperature reading less than or equal to the set limit will
cause an out-of-limit event.
1 Indicates a fault (open or short) for the external temperature
sensor.
1 when AIN2 voltage is greater than its corresponding V
limit. 1 when AIN2 voltage is less than or equal to its
corresponding V
1 when AIN3 voltage is greater than its corresponding V
limit. 1 when AIN3 voltage is less than or equal to its
corresponding V
1 when AIN4 voltage is greater than its corresponding V
limit. 1 when AIN4 voltage is less than or equal to its
corresponding V
D6
0*
Name
AIN4 V
AIN4 V
Reserved
Device ID
Manufacturer’s ID
Silicon Revision
Reserved
SPI Lock Status
Reserved
D5
0*
HIGH
LOW
LOW
LOW
LOW
Limit
Limit
limit.
limit.
limit.
D4
0*
D3
0*
HIGH
D2
0*
or V
LOW
LOW
LOW
limits.
D1
0*
limit. Any
limit. The
HIGH
Power-On
Default
FFh
00h
03h/0Bh/
07h
41h
04h
00h
00h
00h
HIGH
DD
limit. Any
limit.
inter-
HIGH
HIGH
HIGH
D0
0*