ADM1026JST ON Semiconductor, ADM1026JST Datasheet - Page 15

• Manufacturer Part Number: ADM1026JST
• Description: IC CNTRL SYS REF/EEPROM 48LQFP
• Manufacturer: ON Semiconductor

Specifications of ADM1026JST

• Rohs Status: RoHS non-compliant
• Function: Hardware Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: 0°C ~ 100°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFQFP

ADM1026 Read Operations
here.
Receive Byte
from a slave device as follows:
a single byte of data from a RAM or EEPROM location
whose address has previously been set by a send byte or
write byte/word operation. Figure 24 shows this. When
reading from EEPROM, Bit 0 of EEPROM Register 3 must
be set.
Block Read
from a slave device. The start address for a block read must
have been set previously. In the case of the ADM1026 this
is done by a send byte operation to set a RAM address, or by
a write byte/word operation to set an EEPROM address. The
block read operation consists of a send byte operation that
sends a block read command to the slave, immediately
followed by a repeated start and a read operation that reads
out multiple data bytes as follows:
Figure 24. Single−Byte Read from EEPROM or RAM
The ADM1026 uses the SMBus read protocols described
In this operation, the master device receives a single byte
In the ADM1026, the receive byte protocol is used to read
In this operation, the master device reads a block of data
1. The master device asserts a start condition on the
2. The master sends the 7−bit slave address followed
3. The addressed slave device asserts an ACK on the
4. The master receives a data byte.
5. The master asserts a NO ACK on the SDA.
6. The master asserts a stop condition on the SDA to
1. The master device asserts a start condition on the
2. The master sends the 7−bit slave address followed
3. The addressed slave device asserts an ACK on the
4. The master sends a command code that tells the
5. The slave asserts an ACK on the SDA.
6. The master asserts a repeat start condition on the
7. The master sends the 7−bit slave address followed
8. The slave asserts an ACK on the SDA.
9. The ADM1026 sends a byte count data byte that
SDA.
by the read bit (high).
SDA.
end the transaction.
SDA.
by the write bit (low).
SDA.
slave device to expect a block read. The
ADM1026 command code for a block read is A 1h
(10100001).
SDA.
by the read bit (high).
tells the master how many data bytes to expect. The
1
S
ADDRESS
SLAVE
2
R A DATA
3
4
5
A P
6
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15
Register 3 must be set.
Checking (PEC), its use is optional. The PEC byte is
calculated using CRC−8. The Frame Check Sequence (FCS)
conforms to CRC−8 by the polynomial:
Consult the SMBus 1.1 Specification for more information.
Measurement Inputs
that can be configured to perform various functions. It also
measures two supply voltages, 3.3 V MAIN and 3.3 V
STBY, and the internal chip temperature.
measurement, while Pins 27 and 28 can be configured as
analog inputs with a range of 0 V to 2.5 V, or as inputs for
a second remote temperature sensor.
−12 V, +12 V supplies, and the processor core voltage V
The remaining analog inputs, Pins 34 to 41, are
general−purpose analog inputs with a range of 0 V to 2.5 V
(Pins 34 and 35) or 0 V to 3.0 V (Pins 36 to 41).
A−to−D Converter (ADC)
approximation, analog−to−digital converter. The ADC has
a resolution of 8 bits. The basic input range is 0 V to 2.5 V,
which is the input range of A
inputs have built−in attenuators to allow measurement of
V
V
tolerance of these supply voltages, the ADC produces an
BAT
CCP
When block reading from EEPROM, Bit 0 of EEPROM
Note that although the ADM1026 supports Packet Error
The ADM1026 has 17 external analog measurement pins
Pins 25 and 26 are dedicated to remote temperature
Pins 29 to 33 are dedicated to measuring V
These inputs are multiplexed into the on−chip, successive
10. The master asserts an ACK on the SDA.
12. The master asserts an ACK on the SDA after each
13. The ADM1026 issues a PEC byte to the master.
14. A NACK is generated after the PEC byte to signal
15. The master asserts a stop condition on the SDA to
11. The master receives 32 data bytes.
Figure 25. Block Read from EEPROM or RAM
, +5.0 V, -12 V, +12 V, and the processor core voltage
, without any external components. To allow the
ADM1026 always returns 32 data bytes (20h), the
maximum allowed by the SMBus 1.1 specification.
data byte.
The master should check the PEC byte and issue
another block read if the PEC byte is incorrect.
the end of the read.
end the transaction.
S
A
COUNT
ADDRESS
BYTE
SLAVE
C(x) + x
A DATA 1 A
W A
8
) x
A1h BLOCK
COMMAND
READ
2
) x ) 1
IN6
DATA
32
A
to A
S
A
IN9
ADDRESS
SLAVE
PEC A
, but five of the
BAT
R
P
, +5.0 V,
(eq. 1)
CCP.