ADM1026JST ON Semiconductor, ADM1026JST Datasheet - Page 37

• Manufacturer Part Number: ADM1026JST
• Description: IC CNTRL SYS REF/EEPROM 48LQFP
• Manufacturer: ON Semiconductor

Specifications of ADM1026JST

• Rohs Status: RoHS non-compliant
• Function: Hardware Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: 0°C ~ 100°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: 0°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFQFP

Detailed Register Descriptions
Table 10. Register 00h, Configuration Register 1 (Power−On Default 00h)
Table 11. Register 01h, Configuration Register 2 (Power−On Default 00h)
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Enable Voltage/Ext2 = 0
Enable GPIO0/Fan0 = 0
Enable GPIO1/Fan1 = 0
Enable GPIO2/Fan2 = 0
Enable GPIO3/Fan3 = 0
Enable GPIO4/Fan4 = 0
Enable GPIO5/Fan5 = 0
Enable GPIO6/Fan6 = 0
Enable GPIO7/Fan7 = 0
Enable PWM AFC = 0
Enable DAC AFC = 0
Enable THERM = 0
Software Reset = 0
Int Enable = 0
Int Clear = 0
Monitor = 0
Name
Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
When this bit is set the ADM1026 monitors all voltage, temperature and fan
channels in a round robin manner.
When this bit is set, the INT output pin is enabled.
Setting this bit clears an interrupt from the voltage, temperature or fan speed
channels. Because GPIO interrupts are level triggered, this bit has no effect on
interrupts originating from GPIO channels. This bit is cleared by writing a 0 to it. If
in monitoring mode voltages, temperatures and fan speeds continue to be
monitored after writing to this bit to clear an interrupt, so an interrupt may be set
again on the next monitoring cycle.
When this bit is 1, the ADM1026 monitors voltage (A
and 27, respectively. When this bit is 0, the ADM1026 monitors a second thermal
diode temperature channel, D2, on these pins. If the second thermal diode channel
is not being used, it is recommended that the bit be set to 1.
When this bit is 1, the THERM pin (Pin 42) is asserted (go low) if any of the
THERM limits are exceeded. If THERM is pulled low as an input, the DAC and
PWM outputs are forced to full scale until THERM is taken high.
When this bit is 1, the DAC output is enabled for automatic fan speed control
(AFC) based on temperature. When this bit is 0, the DAC Output reflects the value
in Reg 04h, the DAC Control Register.
When this bit is 1, the PWM output is enabled for automatic fan speed control
(AFC) based on temperature. When this bit is 0, the PWM Output reflects the value
in Reg 05h, the PWM Control Register.
Writing a 1 to this bit restores all registers to the power−on defaults. This bit is
cleared by writing a 0 to it. For more info, see the Software Reset Function section.
When this bit is 1, Pin 3 is enabled as a general−purpose I/O pin (GPIO0),
otherwise it is a fan tach measurement input (Fan 0).
When this bit is 1, Pin 4 is enabled as a general−purpose I/O pin (GPIO1),
otherwise it is a fan tach measurement input (Fan 1).
When this bit is 1, Pin 5 is enabled as a general−purpose I/O pin (GPIO2),
otherwise it is a fan tach measurement input (Fan 2).
When this bit is 1, Pin 6 is enabled as a general−purpose I/O pin (GPIO3),
otherwise it is a fan tach measurement input (Fan 3).
When this bit is 1, Pin 9 is enabled as a general−purpose I/O pin (GPIO4),
otherwise it is a fan tach measurement input (Fan 4).
When this bit is 1, Pin 10 is enabled as a general−purpose I/O pin (GPIO5),
otherwise it is a fan tach measurement input (Fan 5).
When this bit is 1, Pin 11 is enabled as a general−purpose I/O pin (GPIO6),
otherwise it is a fan tach measurement input (Fan 6).
When this bit is 1, Pin 12 is enabled as a general−purpose I/O pin (GPIO7),
otherwise it is a fan tach measurement input (Fan 7).
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37
Description
Description
IN8
and A
IN9
) on Pins 28