LP2975AIMM-3.3/NOPB National Semiconductor, LP2975AIMM-3.3/NOPB Datasheet - Page 10

• Manufacturer Part Number: LP2975AIMM-3.3/NOPB
• Description: IC DVR/CTRLR MOSFET LDO 8-MSOP
• Manufacturer: National Semiconductor
• Type: Positive Fixedr

Specifications of LP2975AIMM-3.3/NOPB

• Number Of Outputs: 1
• Voltage - Output: 3.3V
• Current - Supply: 180µA
• Voltage - Input: 1.8 ~ 24 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LP2975AIMM-3.3; LP2975AIMM-3.3TR

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Reference Designs
The load resistor is connected to the regulator output using a
switch so that the load current increases from 0 to 0.5A
abruptly. The change in output voltage is shown in the scope
photo (the vertical scale is 20 mV/division and the horizontal
scale is 50 µs/division). The regulator nominal output (3V) is
located on the center line of the photo. A maximum change
of about −50 mV is shown.
Minimizing C
It is often desirable to decrease the value of C
cost and reduce size. The design guidelines suggest select-
ing C
Output Capacitor), but this is not an absolute requirement in
all cases.
The effect of reducing C
phase margin is decreased, the output ringing will increase
when a load step is applied to the output. Eventually, if C
is made small enough, the regulator will oscillate.
To demonstrate these effects, the value of C
design #2 is halved by removing one of the two 68 µF output
capacitors and the transient response test is repeated (see
photo below). The total overshoot increases from −50 mV to
about −75 mV, and the second “ring” on the transient is
noticeably larger.
OUT
Transient Response for 0–0.5A Load Step
to set the first pole ≤ 200 Hz (see later section
OUT
OUT
is to decrease phase margin. As
(Continued)
OUT
OUT
in reference
to save
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OUT
10
The design is next tested with only a 4.7 µF output capacitor
(see scope photo below). Observe that the vertical scale has
been increased to 100 mV/division to accommodate the
−250 mV undershoot. More important is the severe ringing
as the transient decays. Most designers would recognize
this immediately as the warning sign of a marginally stable
design.
The reason this design is marginally stable is that the 4.7 µF
output capacitor (along with the 6Ω output load) sets the pole
f
the loop is increased to about 100 kHz, allowing the FET’s
gate capacitance pole f
before the loop gain goes below unity. Also, because of the
low output voltage, the feedforward capacitor provides less
than 10˚ of positive phase shift. For good stability, the output
capcitor needs to be larger than 4.7 µF.
For detailed information on stability and phase margin, see
the Application Hints section.
p
at 5 kHz. Analysis shows that the unity-gain frequency of
Transient Response with Output Capacitor Halved
Transient Response with Only 4.7 µF Output Cap
pg
to cause significant phase shift
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