IR3629AMTRPBF International Rectifier, IR3629AMTRPBF Datasheet - Page 10

• Manufacturer Part Number: IR3629AMTRPBF
• Description: IC CTLR PWM SYNC BUCK 12-MLPD
• Manufacturer: International Rectifier

Specifications of IR3629AMTRPBF

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 330kHz
• Duty Cycle: 78%
• Voltage - Supply: 4.5 V ~ 14 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 12-MLPD
• Frequency-max: 330kHz
• Package: 12-Lead MLPD
• Circuit: Sync PWM Controller
• Vcc (min): 4.0
• Vcc (max): 30
• Switch Freq (khz): Internal 300kHz
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: IR3629AMTRPBFTR

Over-Current Protection
The over current protection is performed by
sensing current through the R
side MOSFET. This method enhances the
converter’s efficiency and reduces cost by
eliminating a current sense resistor. As shown in
figure 7, an external resistor (R
between OCSet pin and the drain of the low-side
MOSFET (Q2) which determines the current limit
set point.
The internal current source develops a voltage
across R
turned on, the inductor current flows through the
Q2 and results in a voltage which is given by:
The critical inductor current can be calculated by
setting:
Fig. 7: Connection of over current sensing resistor
An over-current is detected if the OCSet pin goes
below ground. This trips the OCP comparator
and cycles the soft start function in hiccup mode.
The hiccup is performed by charging and
discharging the soft-start capacitor in a certain
slope rate. As shown in figure 8, a 3uA current
source is used to discharge the soft-start
capacitor.
The OCP comparator resets after every soft start
cycle. The converter stays in this mode until the
overload or short circuit is removed. The
converter will automatically recover.
11/29/2007
Hiccup
Control
V
IR3629/29A
OCSet
IR3624
V
I
OCSet
SET
SET
=
(I
=
OCSet
=
. When the low-side MOSFET is
I
I
L
OCSET
(I
(
critical
OCSet
∗
R
)
=
OCSet
∗
R
R
OCSet
OCSet
OCSet
)
R
−
DS
(R
)
∗
(
−
on
R
I
DS(on)
OCSet
SET
)
(R
DS(on)
∗
DS(on)
SET
I
L
)
∗
) is connected
--(
) I
Q1
Q2
L
) 3
of the low-
=
--(
L1
0
) 2
V
OUT
The OCP circuit starts sampling current when the
low gate drive is about 3V. The OCSet pin is
internally clamped during deadtime to prevent
false trigging. Figure 9 shows the OCSet pin
during one switching cycle. As shown, there is
about 150ns delay to mask the deadtime. Since
this node contains switching noises, this delay
also functions as a filter.
The value of R
circuit to ensure that the over-current protection
circuit activates as expected. The IR3629 current
limit
preventing, "no blow up" circuit, and does not
operate as a precision current regulator.
Ch1: Inductor point, Ch2:Ldrv, Ch3:OCSet
Fig. 9: OCset pin during normal condition
Fig. 8: 3uA current source for discharging
I
OCSet
is
IR3629/IR3629A MPbF
soft-start capacitor during hiccup
SS1 / SD
*R
designed
OCSet
SET
20uA
Deadtime
20
should be checked in an actual
Blanking time
primarily
28uA
3uA
Clamp voltage
OCP
as
a
disaster
10