ISL9440AIRZ Intersil, ISL9440AIRZ Datasheet
ISL9440AIRZ
Specifications of ISL9440AIRZ
Related parts for ISL9440AIRZ
ISL9440AIRZ Summary of contents
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... Surface Mount Guidelines for QFN (MLFP) Packages” CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners. FN6383.1 DS(ON) ...
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... RANGE (Note) MARKING (°C) ISL9440IRZ* ISL9440IRZ - 5x5 QFN L32.5x5B ISL9440AIRZ* 9440AIRZ - 5x5 QFN L32.5x5B ISL9441IRZ* ISL9441IRZ - 5x5 QFN L32.5x5B *Add “-T” for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets ...
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Block Diagram BOOT1 VCC_5V UGATE1 PHASE1 ADAPTIVE DEAD-TIME VCC_5V V/I SAMPLE TIMING LGATE1 PGND 0.8V REFERENCE + FB4 18.5pF 1400kΩ 180kΩ FB1 - 16kΩ 0.8V ERROR AMP 1 REF ...
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Typical Application - ISL9440, ISL9441 C3 10µF C7 0.1µF L1 VOUT1 + 3.3µH + +2.5V C14 330µF 330µ IRF7907 10.2k R2 4.75k VOUT3 +5V Q4 IRF7404 VOUT4 +3.3V, 500mA R10 15k + C12 68µF R11 4.75k ...
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Typical Application - ISL9440A C3 10µF C7 0.1µF L1 VOUT1 + 1.8µH + +2.5V C14 330µF 330µ IRF7907 10.2k R2 4.75k VOUT3 +5V Q4 IRF7404 VOUT4 +3.3V, 500mA R10 15k + C12 68µF R11 4.75k R71 ...
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... Ld QFN Package (Note 1 Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C Maximum Operating Temperature . . . . . . . . . . . . . . .-40°C to +85°C Maximum Storage Temperature .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 5.6V to 24V, or VCC_5V = 5V ±10%, C_VCC_5V = 4.7µ +25°C, unless otherwise specified. A ...
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Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application Schematic. V Typical values are at T PARAMETER Minimum Duty Cycle (ISL9440A) FB Bias Current (Note 5) Peak-to-Peak Saw-tooth Amplitude (Note 5) Ramp Offset Soft-start ...
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Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application Schematic. V Typical values are at T PARAMETER PGOOD Rise Time PGOOD Fall Time EARLY WARNING FUNCTIONS Undervoltage Lockout Rising (VCC_5V Pin) Undervoltage Lockout Falling ...
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Pin Descriptions BOOT3, BOOT2, BOOT1 (Pin 20, 26, 31) These pins are bootstrap pins to provide bias for high side driver. The bootstrap diodes are integrated to help reduce total cost and reduce layout complexity. UGATE3, UGATE2, UGATE1 (Pin 21, ...
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V = 5.5V FALLING 1-4 OUT OF 7 OUT REGULATION OUT OUT TYP = 200ms PGOOD 4 3 MAX = 100µ MAX = ...
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Typical Performance Curves (Oscilloscope Plots are Taken Using the ISL9440EVAL1Z Evaluation Board, VIN = 12V Unless Otherwise Noted.) 5.10 5.10 5.09 5.09 5.08 5.08 5.07 5.07 5.06 5.06 5.05 0.0 1.0 2.0 LOAD CURRENT (A) FIGURE 6. PWM3 LOAD REGULATION ...
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Typical Performance Curves (Oscilloscope Plots are Taken Using the ISL9440EVAL1Z Evaluation Board, VIN = 12V Unless Otherwise Noted.) CH3 CH4 CH1 500ns/DIV FIGURE 12. PGOOD RISING TO RST RISING V , 1V/DIV 1V/DIV 1V/DIV ...
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Functional Description General Description The ISL9440, ISL9440A and ISL9441 integrate control circuits for three synchronous buck converters and one linear controller. The three synchronous bucks operate out of phase to substantially reduce the input ripple and thus reduce the input ...
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The input voltage range can be effectively limited by the available maximum duty cycle (D = 93% for ISL9440 and MAX ISL9441 86% for ISL9440A). MAX ⎛ ⎞ OUT d1 -------------------------------- ...
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Where Q is the amount of gate charge required to fully GATE charge the gate of the upper MOSFET. The ΔV defined as the allowable droop in the rail of the upper drive example, suppose an upper MOSFET ...
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Figure 17 shows a Type 2 amplifier and its response along with the responses of the current mode modulator and the converter. The Type 2 amplifier, in addition to the pole at origin, has a zero-pole pair that causes a ...
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Layout Guidelines Careful attention to layout requirements is necessary for successful implementation of an ISL9440, ISL9440A and ISL9441 based DC/DC converter. The ISL9440, ISL9440A and ISL9441 switch at a very high frequency and therefore ...
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Output Capacitor Selection The output capacitors for each output have unique requirements. In general, the output capacitors should be selected to meet the dynamic regulation requirements including ripple voltage and load transients. Selection of output capacitors is also dependent on ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
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Package Outline Drawing L32.5x5B 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 2, 11/07 5.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 4. 80 TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 20 ISL9440, ISL9440A, ...