MAX8554EEE+ Maxim Integrated Products, MAX8554EEE+ Datasheet - Page 18
![IC CNTRLR BUCK PWM 16-QSOP](/photos/6/61/66127/175-16-qsop_sml.jpg)
MAX8554EEE+
Manufacturer Part Number
MAX8554EEE+
Description
IC CNTRLR BUCK PWM 16-QSOP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX8553EEE.pdf
(24 pages)
Specifications of MAX8554EEE+
Pwm Type
Controller
Number Of Outputs
1
Frequency - Max
550kHz
Duty Cycle
95%
Voltage - Supply
4.5 V ~ 28 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
Yes
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QSOP
Frequency-max
550kHz
Output Voltage
0.6 V to 3.5 V
Output Current
25000 mA
Mounting Style
SMD/SMT
Switching Frequency
550 KHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Synchronous Pin
No
Topology
Buck
Dc
0649
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.5V to 28V Input, Synchronous PWM Buck Controllers
for DDR Termination and Point-of-Load Applications
Figure
Carefully observe the PC board layout guidelines to
ensure that noise and DC errors do not corrupt the cur-
rent-sense signals seen by LX and PGND. The IC must
be mounted close to the low-side MOSFET with short,
direct traces making a Kelvin-sense connection to the
source and drain terminals. See the PC Board Layout
section.
The Quick-PWM control architecture responds virtually
instantaneously to transient load changes and elimi-
nates the control loop delay of conventional PWM con-
trollers. Therefore, a large portion of the voltage
deviation during a step load change is from the ESR
(equivalent series resistance) of the output capacitors.
For DDR termination applications, the maximum
allowed voltage deviation is ±40mV for any output load
transition from sourcing current to sinking current.
Passive voltage positioning adjusts the converter’s out-
put voltage based on its load current to optimize tran-
sient response and minimize the required output
capacitance.
Voltage positioning is implemented by connecting a
low ohmic resistor (R4) as shown in
The DH and DL drivers are optimized to drive
MOSFETs that can deliver up to 25A output current. An
adaptive dead-time circuit monitors the DL output and
prevents the high-side MOSFET from turning on until
DL is fully off. There must be a low-resistance, low-
inductance path from the DL driver to the MOSFET gate
in order for the adaptive dead-time circuit to work prop-
18
______________________________________________________________________________________
4. Inductor-Current Waveform
Voltage Positioning
TIME
MOSFET Drivers
Figure
2.
I
I
I
PEAK
LOAD
VALLEY
erly. Otherwise, the sense circuitry in the MAX8553/
MAX8554 can interpret the MOSFET gate as “off” while
there is actually still charge left on the gate. Use very
short, wide traces measuring 10 squares to 20 squares
(50 mils to 100 mils wide if the MOSFET is 1in from the
MAX8553/MAX8554). This adaptive dead-time delay is
in addition to a fixed delay of 30ns (typ). The dead time
at the other edge (DH turning off) is determined by a
fixed 32ns (typ) internal delay.
For the MAX8553, the output voltage, V
50% of V
For the MAX8554, the output voltage can be adjusted
from 600mV to 3.5V using a resistive voltage-divider
(R2 and R3 in Figures 1 and 3). To set the voltage,
choose a value for R3 in the range of 1kΩ to 10kΩ, then
solve for R2 using the following equation:
where V
Three key inductor parameters must be specified:
inductance value (L), peak inductor current (I
and DC resistance (R
between size and efficiency is to set the inductor peak-
to-peak ripple current equal to 30% of the maximum
load current, thus LIR = 0.3. The switching frequency,
input voltage, output voltage, and selected LIR deter-
mine the inductor value as follows:
where f
value is not critical and can be adjusted in order to
make trade-offs among size, cost, and efficiency.
Lower inductor values minimize size and cost and also
improve transient response but reduce efficiency and
increase output voltage ripple due to higher peak cur-
rents. Higher inductance increases efficiency by reduc-
ing the RMS current.
Find a low-loss inductor with the lowest possible DC
resistance that fits in the allotted dimensions. The
inductor’s current saturation rating must exceed the
S
FB
REFIN
is the switching frequency. The exact inductor
L
is 0.6V.
=
.
V
R
IN
2
x f x I
V
=
Setting the Output Voltage
OUT
S
R
3
(
V
DC
LOAD MAX
IN
Design Procedure
V
V
). A good compromise
OUT
−
FB
(
V
Inductor Selection
OUT
)
- 1
)
x LIR
VTT
, is always
PEAK
),