LTC1873EG#TR Linear Technology, LTC1873EG#TR Datasheet

IC REG SW 2PH DUAL SYNC 28SSOP

LTC1873EG#TR

Manufacturer Part Number
LTC1873EG#TR
Description
IC REG SW 2PH DUAL SYNC 28SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1873EG#TR

Pwm Type
Voltage Mode
Number Of Outputs
2
Frequency - Max
750kHz
Duty Cycle
93%
Voltage - Supply
3 V ~ 7 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Frequency-max
750kHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC1873EG#TRLTC1873EG
Manufacturer:
LT/凌特
Quantity:
20 000
FEATURES
TYPICAL APPLICATIO
APPLICATIO S
4.5V TO 5.5V
Two Independent PWM Controllers in One Package
Side 1 Output Is Compliant with Intel Desktop
VRM 8.4 Specifications (Includes 5-Bit VID DAC)
1.3V to 3.5V Output Voltage with 50mV/100mV Steps
Two Sides Run Out-of-Phase to Minimize C
All N-Channel External MOSFET Architecture
No External Current Sense Resistors Required
Precison Internal 0.8V 1% Reference
550kHz Switching Frequency Minimizes External
Component Size
Very Fast Transient Response
Up to 25A Output Current per Channel
Low Shutdown Current: < 100 A
Small 28-Pin SSOP Package
Microprocessor Core and I/O Supplies
Multiple Logic Supply Generator
High Efficiency Power Conversion
Chipset Power Supply
STBY/ON
0.1%
1k
1k
10k
QSS1
U
68k
56k
4.75k
0.1%
330pF
5-BIT VID
QSS2
220pF
+
10 F
0.1 F
56pF
39pF
U
Low Cost Desktop CPU Supply with RDRAM Keepalive
FB2
COMP2
RUN/SS2
RUN/SS1
SENSE
FB1
COMP1
FCB
VID4:0
SGND
V
CC
10
LTC1873
BOOST2
BOOST1
PGND
PV
FAULT
I
I
MAX2
MAX1
CC
SW2
SW1
IN
TG2
BG2
TG1
BG1
+
47k
33k
C
IN
2-Phase Switching Regulator
QT2
QB2
MBR0530T
DESCRIPTIO
Burst Mode is a trademark of Linear Technology Corporation.
The LTC
mized for high efficiency with low input voltages. It includes
two complete, on-chip, independent switching regulator con-
trollers. Each is designed to drive a pair of external
N-channel MOSFETs in a voltage mode feedback, synchro-
nous buck configuration. The LTC1873 includes digital out-
put voltage adjustment on side 1 that conforms to the Intel
Desktop VID specification. A constant-frequency, true PWM
design minimizes external component size and cost and
optimizes load transient performance. The synchronous buck
architecture automatically shifts to discontinuous and then to
Burst Mode
ing maximum efficiency over a wide range of load currents.
The LTC1873 features an onboard reference trimmed to 1%
and delivers better than 1.5% regulation at the converter
outputs over all combinations of line, load and temperature.
Each channel can be enabled independently; with both chan-
nels disabled, the LTC1873 shuts down and supply current
drops below 100 A.
QB1B
QT1B
, LTC and LT are registered trademarks of Linear Technology Corporation.
Dual 550kHz Synchronous
1 F
QT1A
QB1A
Controller with 5-Bit VID
®
1873 is a dual switching regulator controller opti-
1 F
TM
MBR0530T
1 F
operation as the output load decreases, ensur-
IN
L2
L1
GND
LT1761
OUT
ADJ
U
1873 TA01
16.2k
0.1%
16.9k
0.1%
+
+
C
C
OUT1
OUT2
V
2.5V/7A
2.45V/100mA STANDBY
V
1.3V TO 3.5V
20A
C
C
C
L1: 1 H SUMIDA CEP125-1R0MC-H
L2: 2.2 H COILTRONICS UP2B-2R2
QSS1, QSS2: MOTOROLA MMBT3904LT1
QT1A, QT1B, QB1A, QB1B: FAIRCHILD FDS6670A
QT2, QB2: 1/2 SILICONIX Si4966
RDRAM
CORE
IN
OUT1
OUT2
= SANYO 10MV1200GX (6 IN PARALLEL)
= SANYO 6MV1500GX (8 IN PARALLEL)
= SANYO 6MV1500GX (3 IN PARALLEL)
LTC1873
1

Related parts for LTC1873EG#TR

LTC1873EG#TR Summary of contents

Page 1

... Each channel can be enabled independently; with both chan- nels disabled, the LTC1873 shuts down and supply current drops below 100 A. , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a trademark of Linear Technology Corporation. Low Cost Desktop CPU Supply with RDRAM Keepalive ...

Page 2

LTC1873 ABSOLUTE AXI U RATI GS (Note 1) Supply Voltage V CC ........................................................................................... BOOST n ............................................................... 15V BOOST n – .................................................... 7V Input Voltage SW n .......................................................... – VID n ....................................................... – ...

Page 3

ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are unless otherwise specified. (Note 4) CC SYMBOL PARAMETER Switching Characteristics V Oscillator Amplitude OSC f Oscillator ...

Page 4

LTC1873 W U TYPICAL PERFOR A CE CHARACTERISTICS Efficiency vs Load Current 100 3.3V OUT V = 2.5V OUT 1.6V OUT LOAD CURRENT (A) 1873 ...

Page 5

CTIO S PV (Pin 1): Driver Power Supply Input power to the two BG n output drivers. PV connected to a voltage high enough to fully turn on the external MOSFETs QB1 and ...

Page 6

LTC1873 CTIO S VID n pin includes an on-chip 40k series with a diode (see Block Diagram). V (Pin 18): Power Supply Input. All internal circuits CC except the output drivers are powered from this ...

Page 7

W BLOCK DIAGRA V CC 90% DUTY CYCLE OSC 550kHz 3.5 A SOFT RUN/SS1,2 START COMP1,2 I LIM – I MAX1,2 800mV SHUTDOWN TO THIS CONTROLLER 500mV OTHER CONTROLLER U U APPLICATIO S I FOR ATIO ...

Page 8

LTC1873 U U APPLICATIO S I FOR ATIO Table 1. VID Inputs and Corresponding Output Voltage for Channel 1 CODE VID4 VID3 VID2 VID1 00000 GND GND GND GND 00001 GND GND GND GND 00010 GND GND GND Float 00011 ...

Page 9

U U APPLICATIO S I FOR ATIO factor of 3.75. The reduced input ripple voltage also means less power is lost in the input power path, which could include batteries, switches, trace/connector resistances and protection circuitry. Improvements in both conducted ...

Page 10

LTC1873 U U APPLICATIO S I FOR ATIO Switching Architecture Each half of the LTC1873 is designed to operate as a synchronous buck converter (Figure 1). Each channel includes two high power MOSFET gate drivers to control external N-channel MOSFETs ...

Page 11

U U APPLICATIO S I FOR ATIO pin. The output is connected to COMP, which is in turn connected to the soft-start circuitry and from there to the PWM generator. Unlike many regulators that use a resistor divider con- nected ...

Page 12

LTC1873 U U APPLICATIO S I FOR ATIO Each RUN/SS pin shuts down its half of the LTC1873 when it falls below about 0.5V (Figure 4). Between 0.5V and about 1V, that half is active, but the maximum duty cycle ...

Page 13

U U APPLICATIO S I FOR ATIO enhance loop stability. Larger overloads cause the soft- start capacitor to pull down quickly, protecting the output components from damage. The current limit g includes a clamp to prevent it from pulling RUN/SS ...

Page 14

LTC1873 U U APPLICATIO S I FOR ATIO is most severe, and by including a few millivolts offset in the comparator that monitors the SW node. Despite these precautions, some combinations of inductor and layout parasitics can cause the LTC1873 ...

Page 15

U U APPLICATIO S I FOR ATIO FCB Pin In some circumstances desirable to control or disable discontinuous and Burst Mode operations. The FCB (Force Continuous Bar) pin allows the user to do this. When the FCB pin ...

Page 16

LTC1873 U U APPLICATIO S I FOR ATIO normal operation. The MAX comparator will act as usual, turning on QB until output is within range and then allowing the loop to resume normal operation. FAULT can also be pulled down ...

Page 17

U U APPLICATIO S I FOR ATIO that it all has to come out turn the MOSFET gate CC on, and when the MOSFET is turned back off, that charge all ends up at ground. In the ...

Page 18

LTC1873 U U APPLICATIO S I FOR ATIO maintain the input voltage until the input supply can make up the difference. Generally, a capacitor that meets the first two parameters will have far more capacitance than is required to keep ...

Page 19

U U APPLICATIO S I FOR ATIO from C (time point A). 50% of the way through, TG2 IN turns on and the total current is 13A (time point B). Shortly thereafter, TG1 turns off and the current drops to ...

Page 20

LTC1873 U U APPLICATIO S I FOR ATIO OUTPUT BYPASS CAPACITOR The output bypass capacitor has quite different require- ments from the input capacitor. The ripple current at the output of a buck regulator like the LTC1873 is much lower ...

Page 21

U U APPLICATIO S I FOR ATIO So far, the AC response of the loop is pretty well out of the user’s control. The modulator is a fundamental piece of the LTC1873 design, and the external L and C are ...

Page 22

LTC1873 U U APPLICATIO S I FOR ATIO – REF Figure 11a. Type 3 Amplifier Schematic Diagram GAIN (dB) –6dB/OCT +6dB/OCT GAIN 0 PHASE Figure 11b. Type 3 Amplifier ...

Page 23

... APPLICATIO S I FOR ATIO V(OUT) in degrees. Refer to your SPICE manual for details of how to generate this plot. *1873 modulator gain/phase © * 1999 Linear Technology *this file written to run with PSpice 8.0 *may require modifications for other SPICE simulators *MOSFETs rfet mod sw 0.02 ...

Page 24

LTC1873 U U APPLICATIO S I FOR ATIO CURRENT LIMIT PROGRAMMING Programming the current limit on the LTC1873 is straight- forward. The I pin sets the current limit by setting the MAX maximum allowable voltage drop across QB (the bottom ...

Page 25

U U APPLICATIO S I FOR ATIO with 20mV of hysteresis, allowing fairly precise control of the auxiliary voltage. If the LTC1873 is in discontinuous or Burst Mode operation and the auxiliary output voltage drops, the FCB pin will trip ...

Page 26

LTC1873 U U APPLICATIO S I FOR ATIO Maximizing Low Load Current Efficiency Low load current efficiency depends strongly on proper operation in discontinuous and Burst Mode operations ideally optimized system, discontinuous mode reduces conduction losses but not ...

Page 27

U U APPLICATIO S I FOR ATIO TRANSIENT RESPONSE Transient response is the other half of the regulation equation. The LTC1873 can keep the DC output voltage constant to within 1% when averaged over hundreds of cycles. Over just a ...

Page 28

LTC1873 U U APPLICATIO S I FOR ATIO Figure 15a. Capacitor Parasitics Affecting Transient Recovery OUT V ESR V CAP V OUT Selection section describes in detail how to design an optimized feedback loop, appropriate for most ...

Page 29

U U APPLICATIO S I FOR ATIO Implementing voltage positioning is as simple as creating an intentional resistance in the output path to generate the required voltage drop. This resistance can be a low value resistor, a length of PCB ...

Page 30

LTC1873 U U APPLICATIO S I FOR ATIO the actual load for the test, and switch it on and off while watching the output. If this isn’t convenient, a current step generator is needed. This generator needs to be able ...

Page 31

... FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. ...

Page 32

... Synchronous Step-Down Controller with 5-Bit VID Control LTC1753 5-Bit Programmable Synchronous Switching Rregulator LTC1929 2-Phase, Synchronous High Efficiency Converter trademark of Linear Technology Corporation. SENSE Linear Technology Corporation 32 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear-tech.com Single Output, 2-Phase, 25A VID Converter ...

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