ISL6326BIRZ-T Intersil, ISL6326BIRZ-T Datasheet - Page 25

• Manufacturer Part Number: ISL6326BIRZ-T
• Description: IC CTRLR PWM 4PHASE BUCK 40-QFN
• Manufacturer: Intersil

Specifications of ISL6326BIRZ-T

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 275kHz
• Duty Cycle: 25%
• Voltage - Supply: 4.75 V ~ 5.25 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-VFQFN, 40-VFQFPN
• Frequency-max: 275kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

higher portion of the upper-MOSFET losses are dependent
on switching frequency, the power calculation is more
complex. Upper MOSFET losses can be divided into
separate components involving the upper-MOSFET
switching times; the lower-MOSFET body-diode reverse-
recovery charge, Q
conduction loss.
When the upper MOSFET turns off, the lower MOSFET does
not conduct any portion of the inductor current until the
voltage at the phase node falls below ground. Once the
lower MOSFET begins conducting, the current in the upper
MOSFET falls to zero as the current in the lower MOSFET
ramps up to assume the full inductor current. In Equation 26,
the required time for this commutation is t
approximated associated power loss is P
At turn on, the upper MOSFET begins to conduct and this
transition occurs over a time t
approximate power loss is P
A third component involves the lower MOSFET’s reverse-
recovery charge, Q
commutated to the upper MOSFET before the lower-
MOSFET’s body diode can draw all of Q
through the upper MOSFET across VIN. The power
dissipated as a result is P
Finally, the resistive part of the upper MOSFET’s is given in
Equation 29 as P
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 26, 27, and 28. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process involving repetitive
solutions to the loss equations for different MOSFETs and
different switching frequencies.
Current Sensing Resistor
The resistors connected to the Isen+ pins determine the
gains in the load-line regulation loop and the channel-current
balance loop as well as setting the overcurrent trip point.
Select values for these resistors by the following equation:
P
P
P
P
R
UP 4 ,
UP 1 ,
UP 2 ,
UP 3 ,
ISEN
≈
≈
≈
=
=
r
V
V
DS ON
V
IN
IN
---------------------- -
85 10
IN
(
⎛
⎝
⎛
⎜
⎝
R
×
I
----- -
Q
I
----- -
N
N
M
M
X
rr
)
+
–
–
f
S
⎛
⎜
⎝
6
I
-------- -
I
-------- -
UP,4
PP
PP
I
----- -
N
2
2
M
I
------------- -
OCP
rr
rr
⎞
⎟
⎠
⎞ t
⎠
⎞ t
⎟
⎠
N
; and the upper MOSFET R
. Since the inductor current has fully
2
⎛
⎜
⎝
⎛
⎜
⎝
.
d
----
----
2
2
2
1
+
⎞
⎟
⎠
⎞
⎟
⎠
I
--------- - d
f
f
UP,3
PP
12
S
S
2
UP,2
25
2
and is approximately
. In Equation 27, the
.
rr
UP,1
1
, it is conducted
and the
.
DS(ON)
(EQ. 29)
(EQ. 26)
(EQ. 27)
(EQ. 28)
(EQ. 30)
ISL6326B
where R
pin, N is the active channel number, R
the current sense element, either the DCR of the inductor or
R
desired overcurrent trip point. Typically, I
to be 1.3 times the maximum load current of the specific
application.
With integrated temperature compensation, the sensed
current signal is independent on the operational temperature
of the power stage, i.e. the temperature effect on the current
sense element R
temperature compensation function. R
should be the resistance of the current sense element at the
room temperature.
When the integrated temperature compensation function is
disabled by pulling the TCOMP pin to GND, the sensed
current will be dependent on the operational temperature of
the power stage, since the DC resistance of the current
sense element may be changed according to the operational
temperature. R
resistance of the current sense element at the all operational
temperature.
In certain circumstances, it may be necessary to adjust the
value of one or more ISEN resistors. When the components
of one or more channels are inhibited from effectively
dissipating their heat so that the affected channels run hotter
than desired, choose new, smaller values of RISEN for the
affected phases (see the section entitled Channel-Current
Balance). Choose R
decrease in temperature rise in order to cause proportionally
less current to flow in the hotter phase:
In Equation 31, make sure that ΔT
rise above the ambient temperature, and ΔT
temperature rise above the ambient temperature. While a
single adjustment according to Equation 31 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve optimal thermal balance
between all channels.
Load-Line Regulation Resistor
The load-line regulation resistor is labelled R
Its value depends on the desired loadline requirement of the
application.
The desired loadline can be calculated by the following
equation:
where I
and VR
load condition.
R
R
SENSE
ISEN 2 ,
LL
=
V
------------------------ -
FL
DROOP
ISEN
DROOP
=
depending on the sensing method, and I
I
is the full load current of the specific application,
FL
R
ISEN
is the sense resistor connected to the ISEN+
X
is the desired voltage droop under the full
X
in Equation 30 should be the maximum DC
ΔT
----------
ΔT
is cancelled by the integrated
ISEN,2
2
1
in proportion to the desired
2
is the desired temperature
X
X
is the resistance of
OCP
in Equation 30
1
is the measured
FB
can be chosen
in Figure 5.
OCP
April 21, 2006
(EQ. 31)
(EQ. 32)
ISEN
FN9286.0
is the