IR3094MPBF International Rectifier, IR3094MPBF Datasheet - Page 11

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IR3094MPBF

Manufacturer Part Number
IR3094MPBF
Description
IC 3 PHASE PWM CONTROL 48MLPQ
Manufacturer
International Rectifier
Datasheet

Specifications of IR3094MPBF

Pwm Type
Voltage Mode
Number Of Outputs
3
Frequency - Max
540kHz
Duty Cycle
100%
Voltage - Supply
8 V ~ 16 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 150°C
Package / Case
48-MLPQ
Frequency-max
540kHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IR3094MPBF
Manufacturer:
IOR
Quantity:
331
PWM Operation
The IR3094 is a fully integrated 3 phase interleaved PWM control IC which uses voltage mode control with trailing
edge modulation. A high-gain wide-bandwidth voltage type Error Amplifier in the Control IC is used for the voltage
control loop. The PWM block diagram of the IR3094 is shown in Figure 2.
Refer to Figure 3. Upon receiving a clock pulse, the RSFF is set, the internal PWM ramp voltage begins to
increase, the low side driver is turned off, and the high side driver is then turned on. For phase 1, an internal 9pf
capacitor is charged by a current source that proportional to the switching frequency resulting in a ramp rate of
50mV per percent duty cycle. For example, if the steady-state operating switch node duty cycle is 10%, then the
internal ramp amplitude is typically 500mV from the starting point (or floor) to the crossing of the EAOUT control
voltage. When the PWM ramp voltage exceeds the Error Amplifier’s output voltage, the RSFF is reset. This turns
off the high side driver, turns on the low side driver, and discharges the PWM ramp to 0.6V until the next clock
pulse.
Page 11 of 29
CDAC
RDAC
RFB
CCOMP
RCOMP
CSC2
RSC2
CSC3
RSC3
RDRP
VREF
VOSNS-
EAOUT
SCOMP2
SCOMP3
FB
VDRP
VDAC
IROSC
U30
VDRP BUFFER
OVP SET
OVP RESET
OSCBLOCK
+
-
IROSC
ERROR AMPLIFIER
OVP LATCH
S
R
CLK1
CLK2
CLK3
+
-
Q
QB
CLK2
CLK3
Share Adjust Error Amp
Share Adjust Error Amp
0.575V
+
+
-
-
Figure 2 – PWM Block Diagram
PWM COMPARATOR
EAOUT
0% DUTY CYCLE
0 TO IROSC*3/4
0 TO IROSC*3/4
+
-
PWM COMPARATOR
PWM COMPARATOR
-
+
-
+
-
+
CLK2
CLK3
9p
RESET DOMINANT
9p
RESET DOMINANT
9p
S
R
S
R
RESET DOMINANT
RSFF
RSFF
S
R
RSFF
QB
QB
IROSC/2
QB
IROSC
IROSC
Q
Q
VDAC
VDAC
VDAC
Q
0.6V
0.6V
0.6V
X23.5
X23.5
X23.5
+
+
+
-
-
-
GATEH1
GATEL1
GATEH2
GATEL2
GATEH3
GATEL3
CSINM3
CSINP3
CSINM2
CSINP2
CSINM1
CSINP1
VIN
VIN
VIN
1
RCS3
1
CCS3
RCS2
2
1
CCS2
IR3094PBF
RCS1
2
CCS1
2
09/26/05
COUT
VOUT SENSE+
VOUT+
VOUT-
VOUT SENSE-

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