IR3094MPBF International Rectifier, IR3094MPBF Datasheet - Page 24

• Manufacturer Part Number: IR3094MPBF
• Description: IC 3 PHASE PWM CONTROL 48MLPQ
• Manufacturer: International Rectifier

Specifications of IR3094MPBF

• Pwm Type: Voltage Mode
• Number Of Outputs: 3
• Frequency - Max: 540kHz
• Duty Cycle: 100%
• Voltage - Supply: 8 V ~ 16 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 150°C
• Package / Case: 48-MLPQ
• Frequency-max: 540kHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LAYOUT GUIDELINES
The following layout guidelines are recommended to reduce the parasitic inductance and resistance of the PCB
layout, therefore minimizing the noise coupled to the IC. Refer to the schematic in Figure 6 – System Diagram.
x
x
“Package Dimensions”.
x
x
component side of PCB: CSS, RSC2, RSC3, RSET, CVCC and C5VREF. The LGND should only be connected to
ground plan on the center pad under IC
x
pins. The ground side of CBIAS should not be connected to LGND and it should directly ground through vias.
x
ROCSET, CREF, RREF, CSS, CSC2, RSC2, CSC3, RSC3, RSET.
x
of IC and route the two current sense signals in pairs connecting to the IC. The current sense signals should be
located away from gate drive signals and switch nodes.
x
good current share between phases.
x
MOSFET. If possible, Use multiple smaller value ceramic caps instead of one big cap, or use low inductance type of
ceramic cap, to reduce the parasitic inductance.
x
between layers.
x
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Dedicate at least one inner layer of the PCB as power ground plane (PGND).
The center pad of IC must be connected to ground plane (PGND) using the recommended via pattern shown in
The IC’s PGND1, 2, 3 and LGND should connect to the center pad under IC.
The following components must be grounded directly to the LGND pin on the IC using a ground plane on the
Place the decoupling capacitors CVCC and CBIAS as close as possible to the VCC and VCCL1_2, VCCL3
The following components should be placed as close as possible to the respective pins on the IC: RROSC,
Place current sense capacitors CCS1, 2, 3 and resistors RCS1, 2, 3 as close as possible to CSINP1, 2, 3 pins
Use Kelvin connections to route the current sense traces to each individual phase inductor, in order to achieve
Place the input decoupling capacitors closer to the drain of top MOSFET and the source of the bottom
Route the high current paths using wide and short traces or polygons. Use multiple vias for connections
The symmetry of the following connections from phase to phase is important for proper operation:
The Kelvin connections of the current sense signals to inductors.
The gate drive signals from the IC to the MOSFETS.
The polygon shape of switching nodes.
Page 24 of 29
IR3094PBF
09/26/05