HIP6301VCB Intersil, HIP6301VCB Datasheet
HIP6301VCB
Specifications of HIP6301VCB
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HIP6301VCB Summary of contents
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... Ordering Information PART PART NUMBER MARKING HIP6301VCB* HIP6301VCB HIP6301VCBZ* HIP6301VCBZ (Note) HIP6301VCBZA* HIP6301VCBZ (Note) HIP6302VCB* HIP6302VCB HIP6302VCBZ* HIP6302VCBZ (Note) *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets ...
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Pinouts HIP6301V (20 LD SOIC TOP VIEW 1 VID4 2 VID3 3 VID2 4 VID1 5 VID0 6 COMP FS/DIS 9 GND 10 VSEN 2 HIP6301V, HIP6302V PGOOD 18 PWM4 17 ISEN4 16 ...
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HIP6301V Block Diagram VSEN + X 0.9 + X1.15 AND FAULT COMP VID0 VID1 DYNAMIC VID2 VID D/A VID3 VID4 FB 3 HIP6301V, HIP6302V HIP6301V, HIP6302V PGOOD VCC POWER-ON RESET (POR LATCH CLOCK AND S SAWTOOTH GENERATOR ...
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HIP6302V Block Diagram VSEN + X 0.9 + X1.15 AND FAULT COMP VID0 VID1 DYNAMIC VID2 VID D/A VID3 VID4 FB 4 HIP6301V, HIP6302V VCC PGOOD POWER-ON RESET (POR LATCH CLOCK AND S SAWTOOTH GENERATOR + ∑ ...
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HIP6301V and HIP6302V Functional Pin Descriptions HIP6301V (20 LD SOIC TOP VIEW 1 VID4 2 VID3 3 VID2 4 VID1 5 VID0 6 COMP FS/DIS 9 GND 10 VSEN VID4, VID3, VID2, VID1 and VID0 (Pins 1 ...
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Typical Application - HIP6301V Controller with HIP6601B Gate Drivers FB COMP VCC VSEN ISEN1 PGOOD PWM1 PWM2 VID4 VID3 ISEN2 MAIN VID2 CONTROL VID1 HIP6301V VID0 PWM3 ISEN3 FS/DIS PWM4 ISEN4 GND 6 HIP6301V, HIP6302V HIP6301V, HIP6302V +12V VCC BOOT ...
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... Thermal Resistance (Typical, Note SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 5V +0°C to +70°C, Unless Otherwise Specified TEST CONDITIONS = 100kΩ Rising Falling = 100kΩ ...
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RIN FB ERROR AMPLIFIER CORRECTION - ∑ DAC PROGRAMMABLE REFERENCE + ∑ AVERAGE - + ∑ ∑ CORRECTION FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE HIP6301V VOLTAGE AND CURRENT CONTROL LOOPS FOR 2-PHASE ...
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... The HIP6601, HIP6602 or HIP6603 MOSFET driver interfaces with the HIP6301V. For more information, see the datasheets for the individual Intersil MOSFET drivers. The HIP6301V is capable of controlling PWM power channels. Connecting unused PWM outputs to V automatically sets the number of channels. The phase relationship between the channels is 360° ...
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Channel Frequency, as explained previously. Also note the pulses on the COMP terminal. These pulses are the current correction signal feeding into the comparator input (see Figure 1). Figure 5 shows the regulator operating from an ATX ...
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VCORE VREF PGOOD 5.00V 5.00V 50µs/DIV FIGURE 6. VCORE TRACKING THE REFERENCE VOLTAGE AFTER A 1.85V TO 1.10V CHANGE COMMAND VCORE 1.10V 1.10V 5.00V 5.00V VID CHANGE 50µs/DIV FIGURE 7. VCORE TRACKING THE REFERENCE VOLTAGE AFTER A 1.10V ...
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SHORT APPLIED HERE HICCUP MODE. SUPPLY POWERED BY ATX SUPPLY CORE LOAD CURRENT = 31A, 5V LOAD = 5A SUPPLY FREQUENCY = 200kHz, VIN = 12V ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN” FIGURE 8. SHORT APPLIED TO SUPPLY ...
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RIN Cc RFB COMP FB SAWTOOTH ERROR GENERATOR AMPLIFIER CORRECTION - + + - DIFFERENCE REFERENCE DAC TO OTHER CHANNELS TO + OVERCURRENT - TRIP COMPARATOR FIGURE 9. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE SAMPLING Current Sensing and ...
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Droop, Selection The average of the currents detected through the R resistors is also steered to the FB pin. There return path connected to the FB pin except for R current creates a voltage ...
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... Careful component selection, tight layout of the critical components, and short, wide circuit traces minimize the magnitude of voltage spikes. Contact Intersil for evaluation board drawings of the component 2 placement and printed circuit board. (EQ. 5) ...
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LOCATE NEXT TO IC PIN( COMP C T HIP6301V R FB LOCATE NEXT PIN R IN VSEN KEY ISLAND ON POWER PLANE LAYER FIGURE 13. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS ...
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Equation 8: V – OUT OUT ΔI × ------------------------------- - --------------- - = × The current from multiple channels tend to cancel each other ...
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However, large gate-charge increases the switching time, t which increases the upper MOSFET switching losses. SW Ensure that both MOSFETs are within their maximum junction temperature at high ambient temperature by calculating the temperature rise according to package thermal-resistance specifications. ...
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Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...