NCP1396ADR2G ON Semiconductor, NCP1396ADR2G Datasheet - Page 21

• Manufacturer Part Number: NCP1396ADR2G
• Description: IC CTRLR OVP HV 16SOIC
• Manufacturer: ON Semiconductor
• Type: High Performance Resonant Mode Controllersr

Specifications of NCP1396ADR2G

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 575kHz
• Duty Cycle: 52%
• Voltage - Supply: 10.5 V ~ 20 V
• Buck: No
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-SOIC (3.9mm Width, 15 Leads)
• Frequency-max: 575kHz
• Number Of Pwm Outputs: 1
• On/off Pin: No
• Adjustable Output: No
• Switching Freq: 58.2 TO 575kHz
• Operating Supply Voltage (max): 20V
• Output Current: 1000A
• Synchronous Pin: No
• Rise Time: 40ns
• Fall Time: 20ns
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 15
• Package Type: SOIC
• Output Voltage Range: 20 V
• Power Dissipation: 42 mW
• Operating Temperature Range: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Input Voltage: 12V
• Frequency: 500kHz
• Supply Voltage Range: 20V
• Digital Ic Case Style: SOIC
• No. Of Pins: 16
• Svhc: No SVHC (15-Dec-2010)
• Base Number: 1396
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1396ADR2GOSTR

On Figure 46, Q1 is blocked and does not bother the BO
measurement as long as the NTC and the optocoupler are
not activated. As soon as the secondary optocoupler senses
an OVP condition, or the NTC reacts to a high ambient
temperature, Q1 base is brought to ground and the BO pin
goes up, permanently latching off the controller.
Protection Circuitry
to its protection features. The device can react to various
inputs like:
Slow Input
When this input exceeds 1 V typical, the current source
- - Fast events input: like an over- - current condition, a
UVLO
This resonant controller differs from competitors thanks
On this circuit, the slow input goes to a comparator.
need to shut down (sleep mode) or a way to force a
controlled burst mode (skip cycle at low output
power): as soon as the input level exceeds 1 V typical,
Figure 47. This circuit combines a slow and fast input for improved protection features
Reset
+
Reset
VtimerOFF
VtimerON
DRIVING
Itimer
LOGIC
+ - -
Vdd
1 = ok
0 = fault
SS
Vref Fault
ON/OFF
- -
+
1 = fault
0 = ok
Vref Fault
http://onsemi.com
+
1 = ok
0 = fault
+
- -
21
+
- - Slow events input: this input serves as a delayed
Figure 47 depicts the architecture of the fault circuitry.
Itimer turns on, charging the external capacitor Ctimer. If
the fault duration is long enough, when Ctimer voltage
pulses are immediately stopped. When the input is
released, the controller performs a clean startup
sequence including a soft- - start period.
shutdown, where an event like a transient overload
does not immediately stopped pulses but start a timer.
If the event duration lasts longer than what the timer
imposes, then all pulses are disabled. The voltage on
the timer capacitor (pin 3) starts to decrease until it
reaches 1 V. The decrease rate is actually depending
on the resistor the user will put in parallel with the
capacitor, giving another flexibility during design.
FB
Ctimer
Fast Fault
Slow Fault
A
B
Ctimer
Rtimer
A
B
FB
V
CC
Average
Current
Skip
Input
To Primary
Current Sensing
Circuitry