ISL6421AERZ Intersil, ISL6421AERZ Datasheet
ISL6421AERZ
Specifications of ISL6421AERZ
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ISL6421AERZ Summary of contents
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... All other trademarks mentioned are the property of their respective owners. ISL6421A FN9167 TEMP. PART RANGE MARKING (°C) PACKAGE ISL6421AER - 5x5 QFN L32.5x5 ISL6421AERZ - 5x5 QFN (Pb-free) | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004-2006. All Rights Reserved PKG. DWG. # L32.5x5 ...
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Block Diagram OVERCURRENT COUNTER PROTECTION LOGIC SCHEME 1 PWM LOGIC GATE Q PGND ILIM CS AMP CS COMPENSATION COMP FB VSW VOUT ON CHIP VCC LINEAR UVLO SGND POR SOFT-START INT 5V SOFT-START EN SEL18V OLF DCL OC CLK S ...
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Typical Application Schematic NOTE: SGND and PGND to be shorted as close layout ...
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Absolute Maximum Ratings Supply Voltage 8.0V to 18.0V CC Logic Input Voltage Range ...
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Electrical Specifications VCC = 12V, T ENT = L, DCL = L, DSQIN = L, Iout = 12mA, unless otherwise noted. See software description section for I access to the system. (Continued) PARAMETER LINEAR REGULATOR Drop-out Voltage DSQIN PIN DSQIN ...
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Functional Pin Description (Continued) SYMBOL VCC Main power supply to the chip. GATE This is the device output of the PWM. This high current driver output is capable of driving the gate of a power FET. This output is actively ...
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Simultaneously the overload flag (OLF) bit of the system register is set to HIGH. After this time has elapsed, the output is resumed for a time T ON the device output will be current limited to between 500mA and ...
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Byte Format Every byte put on the SDA line must be 8-bits long. The number of bytes that can be transmitted per transfer is unrestricted. Each byte has to be followed by an acknowledge bit. Data is transferred with the ...
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Received Data ( Bus Read Mode The ISL6421A can provide to the master a copy of the 2 System Register information via the I The read mode is Master activated by sending the chip address with R/W ...
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Typical Performance Curves 89 88 18. 14. 50.0 150.0 250.0 350.0 I (mA) OUT FIGURE 4. EFFICIENCY vs LOAD CURRENT 22kHz TONE (0.1V/DIV) 10µs/DIV FIGURE 6. 22kHz TONE VOUT (20mV/DIV) VPWM (20mV/DIV) 2µs/DIV ...
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Typical Performance Curves VOUT (1V/DIV) VPWM (1V/DIV) IOUT (0.2A/DIV) 0.5ms/DIV FIGURE 10. DYNAMIC RESPONSE VOUT = 19.0V VGATE (2V/DIV) VDRAIN (10V/DIV) 2µs/DIV FIGURE 12. GATE AND DRAIN WAVEFORMS VOUT = 19.0V 11 ISL6421A (Continued) VOUT (1V/DIV) VPWM (1V/DIV) IOUT (0.2A/DIV) ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...