ISL62884CHRTZ Intersil, ISL62884CHRTZ Datasheet
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ISL62884CHRTZ
Specifications of ISL62884CHRTZ
Related parts for ISL62884CHRTZ
ISL62884CHRTZ Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Mobile ™ ...
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... Ordering Information PART NUMBER (Notes ISL62884CHRTZ 62884C HRTZ ISL62884CIRTZ 62884C IRTZ NOTES: 1. Add “-T” suffix for tape and reel. Please refer to 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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Pin Function Description PIN NUMBER SYMBOL 1 CLK_EN# Open drain output to enable system PLL clock. It goes low 13 switching cycles after V 10 PGOOD Power-Good open-drain output indicating when the regulator is able to supply ...
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Block Diagram VR_ON MODE DPRSTP# CONTROL DPRSLPVR RBIAS VID0 VID1 VID2 DAC AND VID3 SOFT- START VID4 VID5 VID6 Σ + RTN FB COMP VW IDROOP + ISUM+ CURRENT SENSE - ISUM- 4 ISL62884C VIN VSEN PGOOD CLK_EN# PGOOD AND ...
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Table of Contents Ordering Information ......................................................................................................................... 2 Pin Configuration ................................................................................................................................ 2 Pin Function Description ..................................................................................................................... 3 Block Diagram .................................................................................................................................... 4 Absolute Maximum Ratings ................................................................................................................ 6 Thermal Information .......................................................................................................................... 6 Recommended Operating Conditions .................................................................................................. 6 Electrical Specifiactions ...................................................................................................................... 6 Gate Driver ...
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... Recommended Operating Conditions Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . +5V ±5% Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . +4.5V to 25V Ambient Temperature ISL62884CHRTZ -10°C to +100°C ISL62884CIRTZ . . . . . . . . . . . . . . . . . . -40°C to +100°C Junction Temperature ISL62884CHRTZ -10°C to +125°C ISL62884CIRTZ . . . . . . . . . . . . . . . . . . -40°C to +125° -40°C to +100° TEST CONDITIONS I VR_ON = 1V ...
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Electrical Specifications Operating Conditions: V noted. Boldface limits apply over the operating temperature range, -40°C to +100°C. (Continued) PARAMETER SYMBOL Minimum Output Voltage V CC_CORE(min) (Note 7) R Voltage BIAS CHANNEL FREQUENCY Nominal Channel Frequency f SW(nom) Adjustment Range AMPLIFIERS ...
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... DPRSTP# Leakage Current I DPRSTP# SLEW RATE Slew Rate (For VID Change) NOTES: 7. Limits established by characterization and are not production tested. 8 ISL62884C = 5V -40°C to +100° TEST CONDITIONS ISL62884CHRTZ ISL62884CIRTZ 4mA OL I CLK_EN# = 3.3V OH VR_ON = 0V VR_ON = 1V VIDx = 0V VIDx VIDx = 1V DPRSLPVR = 0V DPRSLPVR = 3.3V ...
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Gate Driver Timing Diagram PWM t LGFUGR UGATE 1V LGATE t FL Simplified Application Circuits < 0:6 > ...
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Simplified Application Circuits PGOOD CLK_EN# VID<0:6> DPRSLPVR DPRSTP# VR_ON VCC VSS FIGURE 2. ISL62884C TYPICAL APPLICATION CIRCUIT USING RESISTOR SENSING 10 ISL62884C (Continued) V+5 V+5 VIN VDD VCCP VIN R BIAS RBIAS PGOOD CLK_EN# VIDS DPRSLPVR DPRSTP# VR_ON VW ISL62884C ...
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... IN LOAD INSERTION RESPONSE 11 ISL62884C The ISL62884C is a single-phase regulator implementing ® Intel IMVP-6™ protocol. It uses Intersil patented 3 R ™(Robust Ripple Regulator™) modulator. The R modulator combines the best features of fixed frequency PWM and hysteretic PWM while eliminating many of their shortcomings ...
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Diode Emulation and Period Stretching FIGURE 6. DIODE EMULATION ISL62884C can operate in diode emulation (DE) mode to improve light load efficiency. In ...
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TABLE 1. VID TABLE VID6 VID5 VID4 VID3 VID2 VID1 VID0 ...
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TABLE 1. VID TABLE (Continued) VID6 VID5 VID4 VID3 VID2 VID1 VID0 ...
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Differential Sensing Figure 9 also shows the differential voltage sensing scheme. VCC and VSS SENSE SENSE voltage sensing signals from the processor die. A unity gain differential amplifier senses the VSS and adds it to the DAC output. The error ...
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TABLE 3. ISL62884C OCP THRESHOLD AND OVERSHOOT REDUCTION FUNCTION R comp OCP MIN NOMINAL MAX THRESHOLD (kΩ) (kΩ) (kΩ) (µA) none none 60 305 400 410 68 205 235 240 62 155 165 170 54 104 120 130 60 78 ...
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MOSFET body diode. Since the body diode voltage drop is much higher than MOSFET r voltage drop, more energy is dissipated on the low-side MOSFET therefore the output voltage overshoot ...
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... A good NTC network can limit the output voltage drift to within 2mV recommended to follow the Intersil evaluation board layout and current-sensing network parameters to minimize engineering time. V (s) also needs to represent real-time I Cn controller to achieve good transient response ...
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Rntcs Cn Rntc OPTIONAL OPTIONAL FIGURE 15. OPTIONAL CIRCUITS FOR RING BACK REDUCTION C is the capacitor used to match the inductor time n constant. It usually takes the parallel of two (or more) capacitors to get the ...
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Substitution of Equation 19 into Equation 1 gives Equation 20: 2 × × I ---- - droop sen Therefore: × sen --------------------------- - i I droop Substitution of Equation ...
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GATE IN OUT DRIVER LOAD LINE SLOPE - MOD EA + COMP VID CHANNEL B LOOP GAIN = CHANNEL A CHANNEL A NETWORK ANALYZER EXCITATION OUTPUT FIGURE 19. LOOP GAIN T2(s) MEASUREMENT SET-UP Optional ...
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Layout Guidelines Table 5 shows the layout considerations. The designators refer to the reference designs shown in Figure 22. NAME GND Create analog ground plane underneath the controller and the analog signal processing components. Don’t let the power ground plane ...
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... Compensation & Current Sensing Network Design for Intersil Multiphase R^3 Regulators for IMVP-6.5 Jia Wei, jwei@intersil.com, 919-405-3605 Attention: 1. "Analysis ToolPak" Add-in is required. To turn on Tools--Add-Ins, and check "Analysis ToolPak" 2. Green cells require user input Operation Parameters Controller Part Number: Phase Number: ...
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VID0 IN VID1 IN VID2 IN VID3 IN VID4 IN VID5 IN VID6 IN VR_ON IN DPRSLPVR IN +3.3V IN CLK_EN# OUT PGOOD OUT OPTIONAL CLK_EN# ---- PGOOD R16 RBIAS 147K VW ---- COMP ISL62884C FB OPTIONAL ---- VSEN C6 ...
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... IRF7821 PWRPAKSO8 IRF7832 PWRPAKSO8 H2511-02550-1/16W1 SM0603 H2511-05760-1/16W1 SM0603 H2511-01473-1/16W1 SM0603 H2511-00100-1/16W1 SM0603 H2511-01911-1/16W1 SM0603 H2511-082R5-1/16W1 SM0603 H2511-00R00-1/16W1 SM0603 H2511-01911-1/16W1 SM0603 H2511-01R00-1/16W1 SM0603 H2511-01102-1/16W1 SM0603 H2511-02611-1/16W1 SM0603 ERT-J1VR103J SM0603 H2511-01002-1/16W1 SM0603 H2511-01821-1/16W1 SM0805 H2511-01913-1/16W1 SM0603 ISL62884CHRTZ QFN-28 March 16, 2010 FN7591.0 ...
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Typical Performance 100 12V 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 I (A) OUT FIGURE 23. ISL62884CEVAL2Z EVALUATION BOARD CCM EFFICIENCY, VID ...
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Typical Performance FIGURE 29. CCM STEADY STATE, V VID = 1.2375V, CH1: PHASE, CH2: V Phase Margin Gain FIGURE 31. REFERENCE DESIGN LOOP GAIN T2(s) MEASUREMENT RESULT FIGURE 33. LOAD TRANSIENT RESPONSE WITH OVERSHOOT REDUCTION FUNCTION DISABLED 12V, ...
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Typical Performance FIGURE 35. LOAD TRANSIENT RESPONSE WITH OVERSHOOT REDUCTION FUNCTION DISABLED 12V, VID = 1.2375V 5A/0A, CH1 FIGURE 37. VID TRANSITION DPRSTP VID = 1.2375V/1.0375V, CH1: ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...
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Package Outline Drawing L28.4x4 28 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 9/ PIN 1 INDEX AREA TOP VIEW (3 . 20) PACKAGE BOUNDARY ( 50) TYPICAL RECOMMENDED LAND PATTERN 30 ...