ISL6424ERZ Intersil, ISL6424ERZ Datasheet

IC REG DUAL LNBP TTL-INP 32-QFN

ISL6424ERZ

Manufacturer Part Number
ISL6424ERZ
Description
IC REG DUAL LNBP TTL-INP 32-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6424ERZ

Applications
Converter, Satellite Set-Top Box Designs
Voltage - Input
8 ~ 14 V
Number Of Outputs
2
Voltage - Output
13 ~ 18 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual Output LNB Supply and Control
Voltage Regulator with I
Advanced Satellite Set-Top Box Designs
The ISL6424 is a highly integrated voltage regulator and
interface IC, specifically designed for supplying power and
control signals from advanced satellite set-top box (STB)
modules to the low noise blocks (LNBs) of two antenna
ports. The device is comprised of two independent current-
mode boost PWMs and two low-noise linear regulators along
with the circuitry required for 22kHz tone generation,
modulation and I
total LNB supply design simple, efficient and compact with
low external component count.
Two independent current-mode boost converters provide the
linear regulators with input voltages that are set to the final
output voltages, plus typically 1.2V to insure minimum power
dissipation across each linear regulator. This maintains
constant voltage drops across each linear pass element
while permitting adequate voltage range for tone injection.
The final regulated output voltages are available at two
output terminals to support simultaneous operation of two
antenna ports for dual tuners. The outputs for each PWM are
set to 13V or 18V by independent voltage select commands
(VSEL1, VSEL2) through the I
compensate for the voltage drop in the coaxial cable, the
selected voltage may be increased by 1V with the line length
compensation (LLC) feature. All the functions on this IC are
controlled via the I
Register (SR, 8 bits). The same register can be read back,
and two bits will report the diagnostic status. Separate enable
commands sent on the I
mode control for each PWM and linear combination, disabling
the output into shutdown mode.
Each output channel is capable of providing 750mA of
continuous current. The overcurrent limit can be digitally
programmed. The SEL18V pin allows the 13V to 18V
transition with an external pin, overriding the I
The ISL6424 is offered in a 32 Ld 5x5 QFN.
2
C device interface. The device makes the
2
C bus by writing 8 bits on System
2
C bus provide independent standby
®
1
2
C bus. Additionally, to
2
C Interface for
Data Sheet
2
C input.
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Single Chip Power Solution
• Switch-Mode Power Converter for Lowest Dissipation
• I
• External Pins to Select 13V/18V Option
• DSQIN1&2 and SEL18V1&2 pins 2.5V Logic Compatible
• Built-In Tone Oscillator Factory Trimmed to 22kHz
• Internal Over-Temperature Protection and Diagnostics
• Internal Overload and Overtemp Flags (Visible on I
• LNB Short-Circuit Protection and Diagnostics
• QFN Package
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• LNB Power Supply and Control for Satellite Set-Top Box
References
• Tech Brief 389 (TB389) - “PCB Land Pattern Design and
Ordering Information
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
ISL6424ER
ISL6424ERZ (Note) ISL6424ERZ -20 to 85 32 Ld 5x5 QFN
September 13, 2005
- True Dual Operation for 2-Tuner/2-Dish Applications
- Both Outputs May be Enabled Simultaneously at
- Integrated DC-DC Converter and I
- Boost PWMs with > 92% Efficiency
- Selectable 13V or 18V Outputs
- Digital Cable Length Compensation (1V)
- Registered Slave Address 0001 00XX
- Full 3.3V/5V Operation up to 400kHz
- Facilitates DiSEqC (EUTELSAT) Encoding
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
- Near Chip-Scale Package Footprint
Surface Mount Guidelines for QFN Packages”; Available
on the Intersil website, www.intersil.com
2
C Compatible Interface for Remote Device Control
Maximum Power
No Leads - Product Outline
PART # *
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2004-2005. All Rights Reserved
ISL6424ER -20 to 85 32 Ld 5x5 QFN L32.5x5
MARKING
PART
TEMP.
(°C)
2
C Interface
(Pb-free)
PACKAGE
ISL6424
FN9175.3
2
L32.5x5
DWG. #
C)
PKG.

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ISL6424ERZ Summary of contents

Page 1

... C input. PART # * ISL6424ER ISL6424ERZ (Note) ISL6424ERZ - 5x5 QFN *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...

Page 2

Pinout ISL6424 (QFN) TOP VIEW PGND2 1 CS2 2 SGND 3 SEL18V1 4 ISL6424ER SEL18V2 5 BYP 6 PGND1 7 GATE1 ISL6424 26 25 CPSWOUT 24 ...

Page 3

Block Diagram OLF1 OVERCURRENT COUNTER PROTECTION DCL LOGIC SCHEME 1 PWM OC1 LOGIC GATE1 8 Q CLK1 S PGND1 7 ILIM1 CS - AMP CS1 ∑ 9 SLOPE COMPENSATION COMP1 11 - FB1 10 VREF1 VSW1 12 VO1 19 ON ...

Page 4

Typical Application Schematic P1 VIN P2 GND 5.1 1500pF L3 D1 100nH STPS2L40U C25 + C4 C27A C27B C5 1µF 1µF 10µF 10µF 56µ 33pF P3 VOUT1 SP1 D3 C21 STPS2L40U 0.1µF P4 GND ...

Page 5

Absolute Maximum Ratings Supply Voltage 8.0V to 18.0V CC Logic Input Voltage Range ...

Page 6

Electrical Specifications V = 12V LLC1 = LLC2 = L, ENT1 = ENT2 = L, DCL = L, DSQIN1 = DSQIN2 = L, Iout = 12mA, unless otherwise noted. See software description section for I PARAMETER 22kHz TONE ...

Page 7

Typical Performance Curves NOTE: With both channels in simultaneous operation at rated output Functional Pin Description SYMBOL FUNCTION 2 SDA Bidirectional data from/ bus. 2 SCL Clock from I C bus. VSW1, 2 Input of the linear post-regulator. ...

Page 8

When the ENT1/2 bit is set HIGH, a continuous 22kHz tone is generated regardless of the DSQIN1/2 pin logic status for the corresponding regulator channel (LNB-A or LNB-B). The ENT1/2 bit must be set LOW when the DSQIN1 and/or DSQIN2 ...

Page 9

The level of logic “0” and logic “1” is dependent of associated value per electrical specification table. One clock pulse is DD generated for each data bit ...

Page 10

System Register Format • Read and Write bit • Read-only bit • All bits reset Power- SR1 DCL SR2 ISEL2 2 Transmitted Data ( ...

Page 11

Received Data ( bus READ MODE The ISL6424 can provide to the master a copy of the system 2 register information via the I C bus in read mode. The read mode is Master activated by sending ...

Page 12

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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