ISL6260CCRZ Intersil, ISL6260CCRZ Datasheet
ISL6260CCRZ
Specifications of ISL6260CCRZ
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ISL6260CCRZ Summary of contents
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... Ordering Information PART NUMBER (Note) PART MARKING ISL6260CCRZ ISL6260 CCRZ ISL6260CCRZ-T* ISL6260 CCRZ ISL6260CIRZ ISL6260 CIRZ ISL6260CIRZ-T* ISL6260 CIRZ *Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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Pinout ISL6260C (40 LD QFN) TOP VIEW PSI# 2 PMON 3 RBIAS 4 VR_TT# 5 NTC GND PAD (BOTTOM) 6 SOFT 7 OCSET COMP ...
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PWM3 PWM output for channel 3. When PWM3 is pulled to 5V VDD, PWM3 will be disabled and allow other channels to operate. PWM2 PWM output for channel 2. For ISL6260C, PSI# low will make this output tri-state. When PWM2 ...
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... Thermal Information Thermal Resistance (Notes 1, 2) QFN Package Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C + 0.3V) Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C DD Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = 5V -40°C to +100°C, unless otherwise noted. Parameters with MIN and/ SYMBOL TEST CONDITIONS I VR_ON = 3 ...
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Electrical Specifications Operating Conditions: V MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER FB Input Current ISEN Imbalance Voltage Input Bias Current SOFT CURRENT Soft-start Current ...
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Electrical Specifications Operating Conditions: V MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER PMON Maximum Voltage Vpmonmax PMON Sourcing Current PMON Sinking Current Maximum Current Sinking ...
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Typical Operating Performance 100 12. (A) OUT FIGURE 1. ACTIVE MODE EFFICIENCY, 3 PHASE, CCM, PSI# = HIGH, VID = 1.4375V 100 ...
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Typical Operating Performance 100 19. (A) OUT FIGURE 7. ACTIVE MODE EFFICIENCY, 2 PHASE, CCM, PSI# = HIGH, VID = 1.4375V 100 ...
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Typical Operating Performance CLK_EN# VR_ON FIGURE 13. SOFT-START WAVEFORM 0V TO 1.2V (BOOT VOLTAGE) AND CLK_EN# TIMING OUT FIGURE 15. 12V-18V INPUT LINE TRANSIENT RESPONSE FIGURE 17. 3 PHASE CURRENT BALANCE, FULL LOAD = 50A 9 ISL6260C ...
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Typical Operating Performance V OUT COMP PIN FIGURE 19. TRANSIENT LOAD RESPONSE, 40A LOAD STEP @ 200A/µs, 3 PHASE FIGURE 21. TRANSIENT LOAD 3 PHASE OPERATION, ZOOM OF RISING EDGE CURRENT BALANCE VID MSB V OUT FIGURE 23. IVID MSB ...
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Typical Operating Performance V OUT DPRSTP# AND PSI# FIGURE 25. C4 ENTRY AND EXIT SLEW RATES WITH DPRSLPVR AND DPRSTP# PWM PGOOD FIGURE 27. UNDERVOLTAGE RESPONSE SHOWING PWM TRI-STATE, VOUT < VID - 300mV I PHASE V OUT PGOOD FIGURE ...
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Typical Operating Performance PSI# CLK_EN# V OUT PHASE 2 FIGURE 31. ISL6260C PHASE ADDING AND DROPPING IN DEEPER SLEEP MODE, LOAD CURRENT = 4.35A PHASE 1 CURRENT PHASE 2 CURRENT FIGURE 33. ISL6260C, INDUCTOR CURRENT WAVEFORM WITH PHASE ADDING AND ...
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Typical Operating Performance 25% 20% 15% 10 0.0 10.0 20.0 30.0 OUTPUT CURRENT (A) FIGURE 37. POWER MONITOR ACCURACY 13 ISL6260C (Continued 19V IN VID = 1.15V 40.0 50.0 FIGURE 38. POWER MONITOR vs OUTPUT CURRENT ...
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Simplified Application Circuit for DCR Current Sensing Figure 39 shows a simplified application circuit for the ISL6260C converter with inductor DCR current sensing. The ISL6208 MOSFET gate driver has a force-continuous- conduction-mode (FCCM) input, that when disabled, allows VR_TT# 7 ...
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Simplified Application Circuit for Resistive Current Sensing Figure 40 shows a simplified application circuit for the ISL6260C converter with external resistor current sensing. A capacitor is added in parallel with RL in order to improve the VR_TT# 7 VID<0:6> PWR ...
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Functional Block Diagram RBIAS VID0 VID1 VID2 VID3 DAC Dacout VID4 VID5 VID6 MODE FCCM CONTROL VO VR_ON MODE SOFT PSI# CONTROL DPRSLPVR DPRSTP# NUMBER OF 10µA PHASES GAIN SELECT) OCSET VSUM + DROOP DFB - DROOP + 1 - ...
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... With ISL6208 gate driver capable of diode emulation, the ISL6260C provides optimum efficiency in both heavy and light conditions. 3 ISL6260C uses Intersil patented R (Robust Ripple 3 Regulator™) modulator. The R modulator combines the best features of fixed frequency PWM and hysteretic PWM while eliminating many of their shortcomings ...
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... Deeper Sleep to Active mode, DPRSLPVR LOW achieves higher dV/dt as required by IMVP-6+ DPRSTP# and DPRSLPVR logic SPEC. 3 Intersil's R intrinsically has voltage-feed-forward. The output voltage is insensitive to a fast slew input voltage change. Refer to Figure 15 in the “Typical Operating Performance” on page 9 for Input Transient Performance. ...
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Modes of Operation Programmed by Logic Signals The operational modes of ISL6260C are programmed by the control signals of DPRSLPVR, DPRSTP#, and PSI#. ISL6260C responds PSI# signal by adding or dropping PWM2 and adjusting the overcurrent protection level accordingly. For ...
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TABLE 3. SUMMARY OF THE FAULT PROTECTION AND RESET OPERATIONS OF ISL6260C FAULT DURATION PRIOR TO PROTECTION Overcurrent 120µs Way-Overcurren (2.5X OC) <2µs Overvoltage 1.7V Immediately Overvoltage +200mV 1ms Undervoltage -300mV 1ms Phase Current Unbalance 1ms Over Temperature Immediately The ...
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SOFT capacitor, C Equation ----------------------------------- - = SOFT SLEWRATE Using a SLEWRATE of 10mV/µs, and the typical I given in the Table Electrical Specifications on page 4 of 205µA, C is: ...
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CCM can be determined using the following relationship, where Rfset is in kΩ and the switching period is in μ Period μ 0.29 ) × Rfset kΩ 2.33 = – In discontinuous ...
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OC + Internal to ISL6260 + Σ RTN VDIFF FIGURE 47. EQUIVALENT MODEL FOR DROOP AND DIE SENSING USING DCR SENSING We do this using the assumption that we desire approximately ...
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Rdrp 2 _ new ( Rdrp 1 Rdrp 80 mV For the best accuracy, the equivalent resistance on the DFB and VSUM pins should be identical so that the bias current of the droop amplifier does ...
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This is the worst case calculation, for example, the actual tolerance of two 10% DCRs is 10%*√(2) = 7%. There are provisions to correct the current imbalance due to layout or to ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...
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Package Outline Drawing L40.6x6 40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 3, 10/06 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( TYP ) ( TYPICAL RECOMMENDED LAND PATTERN 28 ...