ISL6312CRZ-TK Intersil, ISL6312CRZ-TK Datasheet - Page 22
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ISL6312CRZ-TK
Manufacturer Part Number
ISL6312CRZ-TK
Description
IC CTRLR PWM 4PHASE BUCK 48-QFN
Manufacturer
Intersil
Datasheet
1.ISL6312CRZ.pdf
(35 pages)
Specifications of ISL6312CRZ-TK
Applications
Controller, Intel VR10, VR11, AMD CPU
Voltage - Input
5 ~ 12 V
Number Of Outputs
1
Voltage - Output
0.38 ~ 1.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Initialization
Prior to initialization, proper conditions must exist on the EN,
VCC, PVCC and the VID pins. When the conditions are met,
the controller begins soft-start. Once the output voltage is
within the proper window of operation, the controller asserts
PGOOD.
Enable and Disable
While in shutdown mode, the PWM outputs are held in a
high-impedance state to assure the drivers remain off. The
following input conditions must be met, for both Intel and
AMD modes of operation, before the ISL6312 is released
from shutdown mode to begin the soft-start start-up
sequence:
1. The bias voltage applied at VCC must reach the internal
2. The voltage on EN must be above 0.85V. The EN input
3. The voltage on the EN_PH4 pin must be above 1.21V.
4. The driver bias voltage applied at the PVCC pins must
FIGURE 10. POWER SEQUENCING USING THRESHOLD-
power-on reset (POR) rising threshold. Once this
threshold is reached, proper operation of all aspects of
the ISL6312 is guaranteed. Hysteresis between the rising
and falling thresholds assure that once enabled, the
ISL6312 will not inadvertently turn off unless the bias
voltage drops substantially (see “Electrical
Specifications” on page 6).
allows for power sequencing between the controller bias
voltage and another voltage rail. The enable comparator
holds the ISL6312 in shutdown until the voltage at EN
rises above 0.85V. The enable comparator has 110mV of
hysteresis to prevent bounce.
The EN_PH4 input allows for power sequencing between
the controller and the external driver.
reach the internal power-on reset (POR) rising threshold.
FAULT LOGIC
CIRCUIT
SOFT-START
POR
AND
ISL6312 INTERNAL CIRCUIT
SENSITIVE ENABLE (EN) FUNCTION
ENABLE
COMPARATOR
22
+
-
+
-
1.21V
0.85V
VCC
EN
EN_PH4
PVCC1
EXTERNAL CIRCUIT
10.7kΩ
1.40kΩ
+12V
ISL6312
For Intel VR10, VR11 and AMD 6-bit modes of operation
these are the only conditions that must be met for the
controller to immediately begin the soft-start sequence. If
running in AMD 5-bit mode of operation there is one more
condition that must be met:
Once all of these conditions are met the controller will begin
the soft-start sequence and will ramp the output voltage up
to the user designated level.
Intel Soft-Start
The soft-start function allows the converter to bring up the
output voltage in a controlled fashion, resulting in a linear
ramp-up. The soft-start sequence for the Intel modes of
operation is slightly different then the AMD soft-start
sequence.
For the Intel VR10 and VR11 modes of operation, the
soft-start sequence if composed of four periods, as shown in
Figure 11. Once the ISL6312 is released from shutdown and
soft-start begins (as described in “Enable and Disable” on
page 22), the controller will have fixed delay period TD1.
After this delay period, the VR will begin first soft-start ramp
until the output voltage reaches 1.1V VBOOT voltage. Then,
the controller will regulate the VR voltage at 1.1V for another
fixed period TD3. At the end of TD3 period, ISL6312 will
read the VID signals. If the VID code is valid, ISL6312 will
initiate the second soft-start ramp until the output voltage
reaches the VID voltage plus/minus any offset or droop
voltage.
The soft-start time is the sum of the 4 periods as shown in
Equation 17.
T
5. The VID code must not be 11111 in AMD 5-bit mode. This
SS
In order for the ISL6312 to begin operation, PVCC1 is the
only pin that is required to have a voltage applied that
exceeds POR. However, for 2 or 3-phase operation
PVCC2 and PVCC3 must also exceed the POR
threshold. Hysteresis between the rising and falling
thresholds assure that once enabled, the ISL6312 will not
inadvertently turn off unless the PVCC bias voltage drops
substantially (see “Electrical Specifications” on page 6).
code signals the controller that no load is present. The
controller will not allow soft-start to begin if this VID code
is present on the VID pins.
=
TD1
+
TD2
+
TD3
+
TD4
February 1, 2011
(EQ. 17)
FN9289.6