NCP4208MNR2G ON Semiconductor, NCP4208MNR2G Datasheet - Page 10

• Manufacturer Part Number: NCP4208MNR2G
• Description: IC CTLR 8PH VR11.1 PMBUS 48-QFN
• Manufacturer: ON Semiconductor

Specifications of NCP4208MNR2G

• Applications: Controller, Intel VR11.1
• Voltage - Input: 4.7 ~ 5.75 V
• Number Of Outputs: 8
• Voltage - Output: 0.16 ~ 5 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Output Voltage: 0.375 V to 1.6 V
• Input Voltage: 0.3 V to 6 V
• Switching Frequency: 1.5 MHz
• Operating Temperature Range: 0 C to + 85 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 100 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(ADP4000 PWRGD)
Theory of Operation
a multi−mode, fixed frequency PWM control with
multi−phase logic outputs for use in multi−phase
synchronous buck CPU core supply power converters. In
addition, the NCP4208 incorporates a serial interface to
allow the programming of key system performance
specifications and read back CPU data such as voltage,
current and power. Multiphase operation is important for
producing the high currents and low voltages demanded by
today’s microprocessors. Handling the high currents in a
single−phase converter would place high thermal demands
on the components in the system such as the inductors and
MOSFETs.
Startup Sequence
in Figure 7. After both the EN and UVLO conditions are
met, a programmable internal timer goes through one cycle
TD1. This delay cycle is programmed using Delay
Command, default delay = 2 ms). The first eight clock
cycles of TD2 are blanked from the PWM outputs and used
for phase detection as explained in the following section.
Then the programmable internal soft−start ramp is enabled
(TD2) and the output comes up to the boot voltage of 1.1 V.
The boot hold time is also set by the Delay Command. This
second delay cycle is called TD3. During TD3 the processor
VID pins settle to the required VID code. When TD3 is over,
the NCP4208 reads the VID inputs and soft starts either up
or down to the final VID voltage (TD4). After TD4 has been
completed and the PWRGD masking time (equal to VID
OTF masking) is finished, a third cycle of the internal timer
sets the PWRGD blanking (TD5).
using the serial interface and the Delay Command and
Soft−Start Command.
Soft−Start
internal timer. The default value is 0.5 V/msec, which can be
programmed through the I
phase detection cycle have been completed, the SS time
The NCP4208 is an 8−phase VR11 controller; it combines
The NCP4208 follows the VR11 startup sequence shown
The internal delay and soft−start times are programmable
The Soft−Start slope for the output voltage is set by an
(NCP4208 EN)
VID INPUTS
VCC_CORE
Figure 7. System Startup Sequence for VR11
VR READY
SUPPLY
VTT I/O
5.0 V
CPU
UVLO
THRESHOLD
VID INVALID
0.85 V
TD1
2
C interface. After TD1 and the
TD2
50 m
V
(1.1 V)
TD3
BOOT
s
V
VID
VID VALID
TD4
TD5
http://onsemi.com
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(TD2 in Figure 7) starts. The SS circuit uses the internal VID
DAC to increase the output voltage in 6.25 mV steps up to
the 1.1 V boot voltage.
voltage delay time (TD3) is started. The end of the boot
voltage delay time signals the beginning of the second
soft−start time (TD4). The SS voltage changes from the boot
voltage to the programmed VID DAC voltage (either higher
or lower) using 6.25 mV steps.
of the Ton_Rise (0xD5) command code. Table 1. Soft−Start
Codes provides the soft−start values. Figure 8 shows typical
startup waveforms for the NCP4208.
Phase Detection
phase relationship is determined by the internal circuitry that
monitors the PWM outputs. Normally, the NCP4208 operates
as an 8−phase PWM controller.
PWM8 to V
PWM6, PWM7 and PWM8 to V
controller, connect PWM5, PWM6, PWM7 and PWM8 to
V
PWM5, PWM6, PWM7 and PWM8 to V
Table 1. Soft−Start Codes
Channel 1: CSREF, Channel 2: EN, Channel 3: PWM1
CC
Once the SS circuit has reached the boot voltage, the boot
The soft− start slew rate is programmed using Bits <2:0>
During startup, the number of operational phases and their
To operate as a 7−phase controller connect PWM8 to V
To operate as a 6−phase controller, connect PWM7 and
. To operate as a 3−phase controller, connect PWM4,
Figure 8. Typical Startup Waveforms
Code
000
001
010
011
100
101
110
111
CC
. To operate as a 5−phase controller connect
CC
Soft−Start (V/msec)
. To operate as a 4−phase
0.5 = default
0.3
0.3
0.7
0.9
1.1
1.3
1.5
CC
. To operate as
CC
.