MAX17510ATB+T Maxim Integrated Products, MAX17510ATB+T Datasheet - Page 7

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MAX17510ATB+T

Manufacturer Part Number
MAX17510ATB+T
Description
IC REG DDR LOW VOLTAGE 10-TDFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX17510ATB+T

Applications
Converter, DDR
Voltage - Input
1.1 ~ 3.6 V
Number Of Outputs
1
Voltage - Output
0.5 ~ 1.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
10-TDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX1510/MAX17510 are low-voltage, low-dropout
DDR termination linear regulators with an external bias
supply input and a buffered reference output (see
Figures 1 and 2). V
supply that is commonly available in laptop and desk-
top computers. The 3.3V bias supply drives the gate of
the internal pass transistor, while a lower voltage input
at the drain of the transistor (IN) is regulated to provide
V
MAX1510/MAX17510 can drive an n-channel high-side
MOSFET and use a lower input voltage to provide bet-
ter efficiency.
The MAX1510/MAX17510 regulate their output voltage
to the voltage at REFIN. When used in DDR applica-
tions as a termination supply, the MAX1510/MAX17510
deliver 1.25V or 0.9V at 3A peak (typ) from an input
voltage of 1.1V to 3.6V. The MAX1510/MAX17510 sink
up to 3A peak (typ) as required in a termination sup-
ply. The MAX1510/MAX17510 provide shoot-through
protection, ensuring that the source and sink
MOSFETs do not conduct at the same time, yet pro-
duce a fast source-to-sink load transient.
OUT
PIN
10
1
2
3
4
5
6
7
8
9
. By using separate bias and power inputs, the
REFOUT
PGOOD
NAME
AGND
REFIN
PGND
SHDN
OUTS
OUT
V
EP
IN
CC
_______________________________________________________________________________________
CC
Detailed Description
Buffered Reference Output. The output of the unity-gain reference input buffer sources and sinks over
5mA. Bypass REFOUT to AGND with a 0.33µF or greater ceramic capacitor.
Analog Supply Input. Connect to the system supply voltage (+3.3V). Bypass V
greater ceramic capacitor.
Analog Ground. Connect the backside pad to AGND.
External Reference Input. REFIN sets the output regulation voltage (V
Open-Drain Power-Good Output. PGOOD is low when the output voltage is more than 150mV (typ) above
or below the regulation point, during soft-start, and when shut down. 2ms after the output reaches the
regulation voltage during startup, PGOOD becomes high impedance.
Output Sense Input. The OUTS regulation level is set by the voltage at REFIN. Connect OUTS to the
remote DDR termination bypass capacitors. OUTS is internally connected to OUT through a 12kΩ
resistor.
Shutdown Control Input. Connect to V
linear regulator. The reference buffer remains active in shutdown.
Power Ground. Internally connected to the output sink MOSFET.
Output of the Linear Regulator
Power Input. Internally connected to the output source MOSFET.
Exposed Pad. Internally connected to AGND. Connect EP to AGND PCB ground plane to maximize
thermal performance. Not intended as an electrical connection point.
is powered by a 2.7V to 3.6V
Low-Voltage DDR Linear Regulators
CC
for normal operation. Connect to analog ground to shut down the
Figure 1. Standard Application Circuit
1.1V TO 3.6V
V
3.3V BIAS
DDQ
OFF
POWER-GOOD
SUPPLY
FUNCTION
V
IN
=
10kΩ
R1
100kΩ
ON
10kΩ
R2
R3
1000pF
C
1.0μF
10μF
REFIN
C
IN2
C1
OUTS
IN
V
PGOOD
SHDN
REFIN
CC
MAX17510
= V
MAX1510
CC
REFIN
Pin Description
to AGND with a 1µF or
REFOUT
PGND
AGND
OUTS
).
OUT
100μF
C
OUT1
V
OUT
V
REFOUT
C
0.33μF
= V
REFOUT
TT
= V
= V
TTR
DDQ
/2
7

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