MAX1997ETJ+T Maxim Integrated Products, MAX1997ETJ+T Datasheet - Page 12

• Manufacturer Part Number: MAX1997ETJ+T
• Description: IC PWR SUPPLY TFT LCD 32TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX1997ETJ+T

• Applications: Controller, TFT, LCD
• Voltage - Input: 2.7 ~ 5.5 V
• Number Of Outputs: 5
• Voltage - Output: 2.7 ~ 13 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Quintuple/Triple-Output TFT LCD Power Supplies
with Fault Protection and VCOM Buffer
12
MAX1997
19
20
21
22
23
24
25
26
27
28
29
30
31
32
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PIN
MAX1998
11
12
13
14
15
16
17
18
19
20
—
—
—
—
TGNDA
NAME
ONDC
SHDN
DRVP
GATE
FREQ
DRV2
OCN
PFLT
OCP
FBP
FB
LX
IN
Gamma Linear-Regulator (REG 2) Base Drive. Open drain of an internal N-channel MOSFET.
Connect DRV2 to the base of an external PNP linear regulator pass transistor. (See the Pass
Transistor Selection section.)
Main Step-Up Regulator Feedback Input. Connect FB to the center tap of a resistive voltage-
divider between the main output (V
up regulator output voltage. (See the Main Step-Up Regulator, Output Voltage Selection
section.) Place the resistive voltage-divider close to the pin.
G ate- On Li near - Reg ul ator ( RE G P ) Feed b ack Inp ut. FBP r eg ul ates to 1.25V nom i nal . C onnect
FBP to the center tap of a r esi sti ve vol tag e- d i vi d er b etw een the RE G P outp ut and the anal og
g r ound ( GN D ) to set the outp ut vol tag e. P l ace the r esi sti ve vol tag e- d i vi d er cl ose to the p i n.
Gate-On Linear-Regulator (REG P) Base Drive. Open drain of an internal N-channel MOSFET.
Connect DRVP to the base of an external PNP linear-regulator pass transistor. (See the Pass
Transistor Selection section.)
Switching Node. Drain of the internal N-channel power MOSFET for the main step-up
regulator.
Internal Connection. Connect this pin to ground. Do not leave this pin floating.
Overcurrent Comparator Inverting Input. Connect OCN to the center tap of a resistive
voltage-divider connected to the drain of the external input protection P-channel MOSFET.
(See the Input Overcurrent Protection section.) If unused, connect OCN to REF.
Overcurrent Comparator Noninverting Input. Connect OCP to the center tap of a resistive
voltage-divider connected to the source of the external input protection P-channel MOSFET.
The voltage on OCP sets the input overcurrent threshold. (See the Input Overcurrent
Protection section.) If unused, connect OCP to GND.
Gate-Drive Output to the External Input Protection P-Channel MOSFET. (See the Input
Overcurrent Protection section.) If unused, leave GATE unconnected.
Fault Timer Select Input. Pull PFLT above its logic high threshold (0.7 × V
delay period to 87ms. Pull PFLT below its logic low threshold (0.3 × V
period to 22ms. Leave PFLT unconnected to set the fault delay period to 44ms. The fault
delay period for the MAX1998 is fixed at 87ms.
Supply Input. The supply voltage powers all the control circuitry. The input voltage range is
from 2.7V to 5.5V. Bypass IN to GND with a 0.47µF ceramic capacitor. Place the capacitor
within 5mm of IN.
S tep - U p Reg ul ator Log i c C ontr ol Inp ut. The step - up r eg ul ator , V C O M b uffer , and the seq uence
ti m i ng b l ock ar e enab l ed w hen O N D C i s hi g h and d i sab l ed w hen ON D C i s l ow .
Frequency Select Input. Pull FREQ above its logic high threshold (0.7 × V
step-up regulator switching frequency to 1.5MHz. Pull FREQ below its logic low threshold
(0.3 × V
to 750kHz.
Active-Low Shutdown Control Input. All the sections of the device are disabled and the GATE
pin goes high when SHDN is below its 0.4V logic low threshold. Pull SHDN above its 1.6V
logic high threshold to enable the device. Do not leave SHDN unconnected.
IN
) to set the frequency to 375kHz. Leave FREQ unconnected to set the frequency
MAIN
) and the analog ground (GND) to set the main step-
FUNCTION
Pin Description (continued)
IN
) to set the fault delay
IN
IN
) to set the fault
) to set the main