ISL6568CR Intersil, ISL6568CR Datasheet - Page 23

• Manufacturer Part Number: ISL6568CR
• Description: IC CTRLR PWM BUCK 2PHASE 32-QFN
• Manufacturer: Intersil

Specifications of ISL6568CR

• Applications: Controller, Intel VRM9, VRM10, and AMD Hammer Applications
• Voltage - Input: 3 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.84 ~ 1.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Choosing the components for this current sense network is a
two step process. First, R
chosen so that the time constant of this R
network matches the time constant of the inductor L/DCR.
Then the resistor R
sense network gain, obtaining the desired full load droop
voltage. Follow the steps below to choose the component
values for this R-C network.
1. Choose an arbitrary value for C
2. Plug the inductor L and DCR component values, and the
3. Use the new value for R
value is 0.01µF.
values for C
calculate the value for R
26, as well as the desired full load current, I
droop voltage, V
27 to calculate the value for R
R
R
V
COMP
S
DROOP
ISL6568
=
-
+
FIGURE 18. DCR SENSING CONFIGURATION
PHASE1
PHASE2
------------------------ - R
V
DROOP
ICOMP
=
I
ISUM
FL
IREF
---------------------------------------
DCR C
COMP
⋅
S
⋅
DROOP
L
must be chosen to set the current
COMP
COMP
chosen in steps 1, into Equation 26 to
(optional)
COMP
C
, and inductor DCR in Equation
COMP
⋅
COMP
COMP
R
DCR
23
S
and C
R
S
S
.
COMP
obtained from Equation
.
R
I
I L2
L1
INDUCTOR
INDUCTOR
COMP
L
L
COMP
V
L
. The recommended
(s)
COMP
DCR
DCR
-
must be
FL
-C
, full load
COMP
(EQ. 26)
(EQ. 27)
C
I
OUT
V
OUT
OUT
ISL6568
Due to errors in the inductance or DCR it may be necessary
to adjust the value of R
correctly. The effects of time constant mismatch can be seen
in the form of droop overshoot or undershoot during the
initial load transient spike, as shown in Figure 19. Follow the
steps below to ensure the R-C and inductor L/DCR time
constants are matched accurately.
After choosing a new value for R
necessary to adjust the value of R
load droop voltage. Use Equation 27 to obtain the new value
for R
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed.
The load-line regulated converter behaves in a similar
manner to a peak current mode controller because the two
poles at the output filter L-C resonant frequency split with the
introduction of current information into the control loop. The
final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
1. Capture a transient event with the oscilloscope set to
2. Record ∆V1 and ∆V2 as shown in Figure 19.
3. Select a new value, R
4. Replace R
about L/DCR/2 (sec/div). For example, with L = 1µH and
DCR = 1mΩ, set the oscilloscope to 500µs/div.
resistor based on the original value, R
following equation.
the error is corrected. Repeat the procedure if necessary.
R
S
FIGURE 19. TIME CONSTANT MISMATCH BEHAVIOR
COMP 2
.
∆V
1
,
=
COMP
R
COMP 1
with the new value and check to see that
COMP
,
COMP,2
⋅
∆
----------
∆
V
V
1
2
to match the time constants
C
and C
COMP
, for the time constant
S
to obtain the desired full
C
, it will most likely be
.
COMP,1
∆V
∆I
2
, using the
March 9, 2006
V
I
TRAN
(EQ. 28)
OUT
FN9187.4